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[PR66776][PATCH][AARCH64] Add cmovdi_insn_uxtw pattern.


Hi all,

This is a simple patch to add a new cmovdi_insn_uxtw rtx pattern to aarch64 backend.

For the following simple test case:

unsigned long long
foo (unsigned int a, unsigned int b, unsigned int c)
{
  return a ? b : c;
}

With this new pattern, the new code-generation will be:

    cmp    w0, wzr
    csel    w0, w1, w2, ne
    ret

Without the path, the old code-generation is like this:
        uxtw    x2, w2
        uxtw    x1, w1
        cmp     w0, wzr
        csel    x0, x2, x1, eq
        ret


aarch64-none-elf regression test Okay. Okay to commit?

Regards,
Renlin Li

gcc/ChangeLog:

2015-10-02  Renlin Li  <renlin.li@arm.com>

        PR target/66776
        * config/aarch64/aarch64.md (cmovdi_insn_uxtw): New pattern.

gcc/testsuite/ChangeLog:

2015-10-02  Renlin Li  <renlin.li@arm.com>

        PR target/66776
        * gcc.target/aarch64/pr66776.c: New.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c3cd58d..20681cd 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3010,6 +3010,18 @@
   [(set_attr "type" "csel")]
 )
 
+(define_insn "*cmovdi_insn_uxtw"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(if_then_else:DI
+	 (match_operator 1 "aarch64_comparison_operator"
+	  [(match_operand 2 "cc_register" "") (const_int 0)])
+	 (zero_extend:DI (match_operand:SI 3 "register_operand" "r"))
+	 (zero_extend:DI (match_operand:SI 4 "register_operand" "r"))))]
+  ""
+  "csel\\t%w0, %w3, %w4, %m1"
+  [(set_attr "type" "csel")]
+)
+
 (define_insn "*cmov<mode>_insn"
   [(set (match_operand:GPF 0 "register_operand" "=w")
 	(if_then_else:GPF
diff --git a/gcc/testsuite/gcc.target/aarch64/pr66776.c b/gcc/testsuite/gcc.target/aarch64/pr66776.c
new file mode 100644
index 0000000..a5c83b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr66776.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+unsigned long long
+foo (unsigned int a, unsigned int b, unsigned int c)
+{
+  return a ? b : c;
+}
+
+/* { dg-final { scan-assembler-not "uxtw" } } */

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