Re: [PATCH 13/15][ARM/AArch64 Testsuite] Add float16 tests to advsimd-intrinsics testsuite

[Christophe Lyon <christophe dot lyon at linaro dot org>]

On 28 July 2015 at 13:26, Alan Lawrence <alan.lawrence@arm.com> wrote:
> This is a respin of
> https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00488.html, fixing up the
> testsuite for float16 vectors. Relative to the previous version, most of the
> additions to the tests are now within #if..#endif such that they are only
> compiled if we have a scalar __fp16 type (the exception is hfloat16_t: since
> this is actually an integer type, we can define and use it without any
> compiler fp16 support). Also we  try to use add_options_for_arm_neon_fp16
> for all tests (on ARM targets), falling back to add_options_for_arm_neon if
> the previous fails.
>
> Cross-tested on many multilibs, including -march=armv6,
> -march=armv7-a{,-mfpu=neon-fp16}, -march=armv7-a/-mfpu=neon,
> -march=armv7-a/-mfp16-format=none{,/-mfpu=neon-fp16,/-mfpu=neon},
> -march=armv7-a/-mfp16-format=alternative .
>
Hi Alan,

It looks OK.
Did you also run the tests on AArch64?

> Note that on bigendian, this requires path at
> https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00696.html , which I will
> commit at the same time.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp:
>         Set additional_flags for neon-fp16 if supported, else fallback to
> neon.
>
>         * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
>         (hfloat16_t): New.
>         (result, expected, clean_results, DECL_VARIABLE_64BITS_VARIANTS,
>         DECL_VARIABLE_128BITS_VARIANTS): Add float16x4_t and float16x8_t
> cases
>         if supported.
>         (CHECK_RESULTS): Redefine using CHECK_RESULTS_NAMED.
>         (CHECK_RESULTS_NAMED): Move body to CHECK_RESULTS_NAMED_NO_FP16;
>         redefine in terms of CHECK_RESULTS_NAMED_NO_FP16 with float16
> variants
>         when those are supported.
>         (CHECK_RESULTS_NAMED_NO_FP16, CHECK_RESULTS_NO_FP16): New.
>         (vdup_n_f16): New.
>
>         * gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h (buffer,
>         buffer_pad, buffer_dup, buffer_dup_pad): Add float16x4 and
> float16x8_t
>         cases if supported.
>
>         * gcc.target/aarch64/advsimd-intrinsics/vbsl.c (exec_vbsl):
>         Use CHECK_RESULTS_NO_FP16 in place of CHECK_RESULTS.
>         * gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c
> (exec_vdup_vmov):
>         Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c
> (exec_vdup_lane):
>         Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vext.c (exec_vext):
> Likewise.
>
>         * gcc.target/aarch64/advsimd-intrinsics/vcombine.c (expected):
>         Add float16x8_t case.
>         (main, exec_vcombine): test float16x4_t -> float16x8_t, if
> supported.
>         * gcc.target/aarch64/advsimd-intrinsics/vcreate.c (expected,
>         main, exec_vcreate): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vget_high (expected,
>          exec_vget_high): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vget_low.c (expected,
>         exec_vget_low): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vld1.c (expected,
> exec_vld1):
>         Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vld1_dup.c (expected,
>         exec_vld1_dup): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vld1_lane.c (expected,
>         exec_vld1_lane): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vldX.c (expected,
> exec_vldX):
>         Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c (expected,
>         exec_vldX_dup): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c (expected,
>         exec_vldX_lane): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vset_lane.c (expected,
>         exec_vset_lane): Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c (expected,
>          exec_vst1_lane): Likewise.