Re: [PATCH] Add X != !X pattern

[James Greenhalgh <james dot greenhalgh at arm dot com>]

On Wed, Aug 05, 2015 at 12:09:35PM +0100, Richard Biener wrote:
> On Wed, 5 Aug 2015, Andrew Pinski wrote:
> 
> > On Wed, Aug 5, 2015 at 3:16 AM, Richard Biener <rguenther@suse.de> wrote:
> > > On Wed, 5 Aug 2015, Andreas Schwab wrote:
> > >
> > >> Richard Biener <rguenther@suse.de> writes:
> > >>
> > >> >     * gimple-fold.c (gimple_fold_stmt_to_constant_1): Canonicalize
> > >> >     bool compares on RHS.
> > >> >     * match.pd: Add X ==/!= !X is false/true pattern.
> > >>
> > >> ERROR in VTST/VTSTQ (/opt/gcc/gcc-20150805/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c line 97 in buffer 'expected_signed') at type uint8x8 index 1: got 0x1 != 0xff  (signed input)
> > >> FAIL: gcc.target/aarch64/advsimd-intrinsics/vtst.c   -O1  execution test
> > >> FAIL: gcc.target/aarch64/simd/int_comparisons_1.c scan-assembler-times [ \t]cmtst[ \t]+v[0-9]+.[0-9]+[bshd],[ \t]*v[0-9]+.[0-9]+[bshd],[ \t]+v[0-9]+.[0-9]+[bshd] 14
> > >> FAIL: gcc.target/aarch64/simd/int_comparisons_1.c scan-assembler-times [ \t]cmtst[ \t]+d[0-9]+,[ \t]*d[0-9]+,[ \t]+d[0-9]+ 4
> > >> FAIL: gcc.target/aarch64/simd/int_comparisons_2.c execution test
> > >> FAIL: gcc.target/aarch64/singleton_intrinsics_1.c scan-assembler-times \\tcmtst\\td[0-9]+, d[0-9]+, d[0-9]+ 2
> > >
> > > Ick - somebody will have to come up with a reduced testcase for one of
> > > this (best an execute fail).  Reduced to one failing case so I can
> > > investigate with a cross compiler.
> > >
> > > Eventually smells like a aarch64 vector specific issue or a latent
> > > issue with the truth_valued_p predicate for vector types.
> > 
> > Or constant_boolean_node is not returning {-1,-1,-1,-1} for true vectors.
> 
> It does.

You could try with the attached (execute) testcase.

Output for me (x86_64/AArch64 trunk compiler) is:

  Expected: 0000ffffffffff00 Got: 00007f80807f8000

Those folded values look suspicious! We fold as so:

arg1_2 = { -128, -1, 127, -122, -128, -1, 0, 118 };
arg2_3 = { 127, -128, 127, -128, -1, 127, 127, 0 };

Visiting statement:
_5 = arg1_2 & arg2_3;
which is likely CONSTANT
Match-and-simplified arg1_2 & arg2_3 to { 0, -128, 127, -128, -128, 127, 0, 0 }
Lattice value changed to CONSTANT { 0, -128, 127, -128, -128, 127, 0, 0 }.  Adding SSA edges to worklist.
interesting_ssa_edges: adding SSA use in _13 = VIEW_CONVERT_EXPR<uint8x8_t>(_5);
marking stmt to be not simulated again

I'd have expected masks of "-1" in the true vector lanes rather than what
we end up with.

Thanks,
James 

#include <inttypes.h>
#include <stdio.h>

typedef int8_t int8x8_t __attribute__ ((vector_size (8)));
typedef uint8_t uint8x8_t __attribute__ ((vector_size (8)));
typedef uint64_t uint64x1_t __attribute__ ((vector_size (8)));

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
vtst_s8 (int8x8_t __a, int8x8_t __b)
{
  return (uint8x8_t) ((__a & __b) != 0);
}

int
main (int argc, char** argv)
{
  int8x8_t arg1 = (int8x8_t) UINT64_C (0x7600ff80867fff80);
  int8x8_t arg2 = (int8x8_t) UINT64_C (0x007f7fff807f807f);
  uint8x8_t result;
  uint64_t got;

  /*  Expected result = 0000ffffffffff00  */
  result = vtst_s8(arg1, arg2);
  got = ((uint64x1_t) result)[0];
  uint64_t expected = UINT64_C(0x0000ffffffffff00);
  if(expected != got)
    {
      printf("Expected: %016" PRIx64 " Got: %016" PRIx64 "\n", expected, got);
    }
}