Re: [AArch64] Improve TLS Descriptor pattern to release RTL loop IV opt

[James Greenhalgh <james dot greenhalgh at arm dot com>]

On Tue, Jul 28, 2015 at 02:12:36PM +0100, Jiong Wang wrote:
> 
> The instruction sequences for preparing argument for TLS descriptor
> runtime resolver and the later function call to resolver can actually be
> hoisted out of the loop.
> 
> Currently we can't because we have exposed the hard register X0 as
> destination of "set".  While GCC's RTL data flow infrastructure will
> skip or do very conservative assumption when hard register involved in
> and thus some loop IV opportunities are missed.
> 
> This patch add another "tlsdesc_small_pseudo_<mode>" pattern, and avoid
> expose x0 to gcc generic code.
> 
> Generally, we define a new register class FIXED_R0 which only contains register
> 0, so the instruction sequences generated from the new add pattern is the same
> as tlsdesc_small_<mode>, while the operand 0 is wrapped as pseudo register that
> RTL IV opt can handle it.
> 
> Ideally, we should allow operand 0 to be any pseudo register, but then
> we can't model the override of x0 caused by the function call which is
> hidded by the UNSPEC.
> 
> So here, we restricting operand 0 to be x0, the override of x0 can be
> reflected to the gcc.
> 
> OK for trunk?

OK.

Thanks,
James