Re: [PATCH][RFC] Add FRE in pass_vectorize

[Alan Lawrence <alan dot lawrence at arm dot com>]

Jeff Law wrote:
> On 06/24/2015 01:59 AM, Richard Biener wrote:
> > And then there is the possibility of making passes generate less
> > needs to perform cleanups after them - like in the present case
> > with the redundant IVs make them more appearant redundant by
> > CSEing the initial value and step during vectorizer code generation.
> > I'm playing with the idea of adding a simple CSE machinery to
> > the gimple_build () interface (aka match-and-simplify).  It
> > eventually invokes (well, not currently, but that can be fixed)
> > maybe_push_res_to_seq which is a good place to maintain a
> > table of already generated expressions.  That of course only
> > works if you either always append to the same sequence or at least
> > insert at the same place.
> As you know we've gone back and forth on this in the past.  It's always 
> a trade-off.  I still ponder from time to time putting the simple CSE 
> and cprop bits back into the SSA rewriting phase to avoid generating all 
> kinds of garbage that just needs to be cleaned up later -- particularly 
> for incremental SSA updates.

Coming to this rather late, and without the background knowledge about having 
gone back and forth, sorry! But what are the arguments against this? Am I right 
in thinking that the "SSA Rewriting" phase would not trigger as often as 
gimple_build(), or are these the same thing?

Presumably when you say "simple CSE machinery" you'd have to bail out quickly 
from tricky cases like, say:

if (P)
  {
    use ...expr...
  }
...
if (Q)
  {
    now building a new ...expr... here
  }

Thanks, Alan