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[PATCH][AARCH64]Use mov for add with large immediate.


Hi all,

This is a simple patch to generate a move instruction to temporarily hold the large immediate for a add instruction.

GCC regression test has been run using aarch64-none-elf toolchain. NO new issues.

Okay for trunk?

Regards,
Renlin Li

gcc/ChangeLog:

2015-04-21  Renlin Li  <renlin.li@arm.com>

    * config/aarch64/aarch64.md (add<mode>3): Use mov when allowed.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1f4169e..9ea1939 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1414,18 +1414,28 @@
   "
   if (! aarch64_plus_operand (operands[2], VOIDmode))
     {
-      rtx subtarget = ((optimize && can_create_pseudo_p ())
-		       ? gen_reg_rtx (<MODE>mode) : operands[0]);
       HOST_WIDE_INT imm = INTVAL (operands[2]);
-
-      if (imm < 0)
-	imm = -(-imm & ~0xfff);
+      if (aarch64_move_imm (imm, <MODE>mode)
+	  && can_create_pseudo_p ())
+      {
+	rtx tmp = gen_reg_rtx (<MODE>mode);
+	emit_move_insn (tmp, operands[2]);
+	operands[2] = tmp;
+      }
       else
-        imm &= ~0xfff;
+      {
+	rtx subtarget = ((optimize && can_create_pseudo_p ())
+			 ? gen_reg_rtx (<MODE>mode) : operands[0]);
+
+	if (imm < 0)
+	  imm = -(-imm & ~0xfff);
+	else
+	  imm &= ~0xfff;
 
-      emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
-      operands[1] = subtarget;
-      operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
+	emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
+	operands[1] = subtarget;
+	operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
+      }
     }
   "
 )

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