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RFA: RL78: Fix register constraints in rl78-real.md
- From: Nick Clifton <nickc at redhat dot com>
- To: dj at redhat dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 03 Mar 2015 15:42:22 +0000
- Subject: RFA: RL78: Fix register constraints in rl78-real.md
- Authentication-results: sourceware.org; auth=none
Hi DJ,
Compiling a program with one of the real RL78 registers marked as
call-used (eg via -fcall-used-ax), can trigger an internal compiler
error. Although modifying the ABI in this way may not be a good idea,
it is still wrong that the compiler generates an ICE.
The patch below fixes the problem by removing real RL78 registers from
the "general" register class, so that they can only be allocated
explicitly by the RL78 backend. It also updates the patterns in
rl78-real.md so that where before they used the "r" general register
constraint they now use the "R" and "v" register constraints.
Tested with no regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-03-03 Nick Clifton <nickc@redhat.com>
* config/rl78/rl78.h (enum reg_class): Remove real registers from
General register class.
* config/rl78/rl78-real.md: Replace general register constraints
with real+virtual register constraints.
Index: gcc/config/rl78/rl78-real.md
===================================================================
--- gcc/config/rl78/rl78-real.md (revision 221150)
+++ gcc/config/rl78/rl78-real.md (working copy)
@@ -59,7 +59,7 @@
)
(define_insn "*movqi_real"
- [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=g,RaxbcWab,RaxbcWab,a, bcx,R, WabWd2WhlWh1WhbWbcWs1v, bcx,WsaWsf")
+ [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=Rv,RaxbcWab,RaxbcWab,a, bcx,R, WabWd2WhlWh1WhbWbcWs1v, bcx,WsaWsf")
(match_operand 1 "rl78_general_operand" "0,K, M, RInt8sJvWabWdeWd2WhlWh1WhbWbcWs1,Wab,aInt8J,a, R, i"))]
"rl78_real_insns_ok ()"
"@
@@ -75,7 +75,7 @@
)
(define_insn "*movhi_real"
- [(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=g,AB,AB,RSv,A,BDTvSWabWd2WdeWhlWh1WbcWs1, BDT,ABDT,v")
+ [(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=Rv,AB,AB,RSv,A,BDTvSWabWd2WdeWhlWh1WbcWs1, BDT,ABDT,v")
(match_operand:HI 1 "rl78_general_operand" " 0,K, M, i, BDTvSWabWd2WdeWh1WhlWbcWs1,A, BDT,vS, ABDT"))]
"rl78_real_insns_ok ()"
"@
@@ -93,7 +93,7 @@
;;---------- Conversions ------------------------
(define_insn "*zero_extendqihi2_real"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rv,A")
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=Rv,A")
(zero_extend:HI (match_operand:QI 1 "general_operand" "0,a")))]
"rl78_real_insns_ok ()"
"@
@@ -113,7 +113,7 @@
;;---------- Arithmetic ------------------------
(define_insn "*addqi3_real"
- [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=rvWabWhlWh1,rvWabWhlWh1,a,*bcdehl,Wsa")
+ [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=RvWabWhlWh1,RvWabWhlWh1,a,*bcdehl,Wsa")
(plus:QI (match_operand:QI 1 "rl78_general_operand" "%0,0,0,0,0")
(match_operand:QI 2 "rl78_general_operand" "K,L,RWhlWh1Wabi,a,i")))
]
@@ -146,8 +146,8 @@
)
(define_insn "*addqihi3a_real"
- [(set (match_operand:HI 0 "register_operand" "=r")
- (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
+ [(set (match_operand:HI 0 "register_operand" "=R")
+ (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "R"))
(match_operand:HI 2 "register_operand" "0")))
]
"rl78_real_insns_ok ()"
@@ -381,7 +381,7 @@
[(set (pc) (if_then_else
(match_operator 0 "rl78_cmp_operator_real"
[(match_operand:QI 1 "rl78_general_operand" "Wabvaxbc,a, vWsaWab,bcdehl")
- (match_operand:QI 2 "rl78_general_operand" "M, irvWabWhlWh1Whb,i,a")])
+ (match_operand:QI 2 "rl78_general_operand" "M, iRvWabWhlWh1Whb,i,a")])
(label_ref (match_operand 3 "" ""))
(pc)))]
"rl78_real_insns_ok ()"
Index: gcc/config/rl78/rl78.h
===================================================================
--- gcc/config/rl78/rl78.h (revision 221150)
+++ gcc/config/rl78/rl78.h (working copy)
@@ -266,7 +266,7 @@
{ 0x00000c00, 0x00000000 }, /* R10 - HImode */ \
{ 0xff000000, 0x00000000 }, /* INT - HImode */ \
{ 0xff7fff00, 0x00000000 }, /* Virtual registers. */ \
- { 0xff7fffff, 0x00000002 }, /* General registers. */ \
+ { 0xff7fff00, 0x00000002 }, /* General registers. */ \
{ 0x04000000, 0x00000004 }, /* PSW. */ \
{ 0xff7fffff, 0x0000001f } /* All registers. */ \
}