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Re: PATCH [5 of 7], rs6000, add support for scalar floating point in Altivec registers


On Tue, Nov 11, 2014 at 8:16 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> This is the big patch that enables the upper regs support.  It reorganizes the
> secondary reload handler to try and make it easier to understand, by having a
> variable that says it is done, rather than using cascading if statements.  The
> secondary reload inner function (which is called from the reload helper
> functions with a base scratch register) has been reworked quite a bit.
>
> I also discovered that we have two peephole2's that try to reduce SF->SF and
> DF->DF moves.  Unfortunately, this breaks the use of a traditional floating
> point register to reload data in/out of an Altivec register.  At some future
> point, I would like to revisit this, but it is needed to enable the upper regs
> support.
>
> I don't believe this will affect the non-server PowerPC ports, since the reload
> handlers are only enabled under VSX.  However, it would be nice if other
> PowerPC folk can apply these patches and make sure there are no regressions.
>
> Is this patch ok to check in?
>
> 2014-11-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
>             Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
>
>         * config/rs6000/rs6000.c (rs6000_secondary_reload_toc_costs):
>         Helper function to identify costs of a TOC load for secondary
>         reload support.
>         (rs6000_secondary_reload_memory): Helper function for secondary
>         reload, to determine if a particular memory operation is directly
>         handled by the hardware, or if it needs support from secondary
>         reload to create a valid address.
>         (rs6000_secondary_reload): Rework code, to be clearer.  If the
>         appropriate -mupper-regs-{sf,df} is used, use FPR registers to
>         reload scalar values, since the FPR registers have D-form
>         addressing. Move most of the code handling memory to the function
>         rs6000_secondary_reload_memory, and use the reg_addr structure to
>         determine what type of address modes are supported.  Print more
>         debug information if -mdebug=addr.
>         (rs6000_secondary_reload_inner): Rework entire function to be more
>         general.  Use the reg_addr bits to determine what type of
>         addressing is supported.
>         (rs6000_preferred_reload_class): Rework.  Move constant handling
>         into a single place.  Prefer using FLOAT_REGS for scalar floating
>         point.
>         (rs6000_secondary_reload_class): Use a FPR register to move a
>         value from an Altivec register to a GPR, and vice versa.  Move VSX
>         handling above traditional floating point.
>
>         * config/rs6000/rs6000.md (mov<mode>_hardfloat, FMOVE32 case):
>         Delete some spaces in the constraints.
>         (DF->DF move peephole2): Disable if -mupper-regs-{sf,df} to
>         allow using FPR registers to load/store an Altivec register for
>         scalar floating point types.
>         (SF->SF move peephole2): Likewise.

Okay,

Thanks, David


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