This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH i386 AVX512] [78/n] Use blend for inserting.


Hello,
This patch extends insertion hook.

AVX-512* tests on top of patch-set all pass
under simulator.


gcc/
	* config/i386/i386.c
	(ix86_expand_vector_set): Handle V8DF, V8DI, V16SF, V16SI, V32HI, V64QI
	modes.

--
Thanks, K

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fcccdc3..b20eabf 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -40902,6 +40902,79 @@ half:
       emit_insn (gen_insert[j][i] (target, target, tmp));
       return;
 
+    case V8DFmode:
+      if (TARGET_AVX512F)
+	{
+	  tmp = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, tmp,
+				  gen_rtx_VEC_DUPLICATE (mode, val)));
+	  emit_insn (gen_avx512f_blendmv8df (target, tmp, target,
+					     force_reg (QImode, GEN_INT (1 << elt))));
+	  return;
+	}
+      else
+	break;
+    case V8DImode:
+      if (TARGET_AVX512F)
+	{
+	  tmp = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, tmp,
+				  gen_rtx_VEC_DUPLICATE (mode, val)));
+	  emit_insn (gen_avx512f_blendmv8di (target, tmp, target,
+					     force_reg (QImode, GEN_INT (1 << elt))));
+	  return;
+	}
+      else
+	break;
+    case V16SFmode:
+      if (TARGET_AVX512F)
+	{
+	  tmp = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, tmp,
+				  gen_rtx_VEC_DUPLICATE (mode, val)));
+	  emit_insn (gen_avx512f_blendmv16sf (target, tmp, target,
+					      force_reg (HImode, GEN_INT (1 << elt))));
+	  return;
+	}
+      else
+	break;
+    case V16SImode:
+      if (TARGET_AVX512F)
+	{
+	  tmp = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, tmp,
+				  gen_rtx_VEC_DUPLICATE (mode, val)));
+	  emit_insn (gen_avx512f_blendmv16si (target, tmp, target,
+					      force_reg (HImode, GEN_INT (1 << elt))));
+	  return;
+	}
+      else
+	break;
+    case V32HImode:
+      if (TARGET_AVX512F && TARGET_AVX512BW)
+	{
+	  tmp = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, tmp,
+				  gen_rtx_VEC_DUPLICATE (mode, val)));
+	  emit_insn (gen_avx512bw_blendmv32hi (target, tmp, target,
+					       force_reg (SImode, GEN_INT (1 << elt))));
+	  return;
+	}
+      else
+	break;
+    case V64QImode:
+      if (TARGET_AVX512F && TARGET_AVX512BW)
+	{
+	  tmp = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, tmp,
+				  gen_rtx_VEC_DUPLICATE (mode, val)));
+	  emit_insn (gen_avx512bw_blendmv64qi (target, tmp, target,
+					       force_reg (DImode, GEN_INT (1 << elt))));
+	  return;
+	}
+      else
+	break;
+
     default:
       break;
     }


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]