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Re: [PATCH i386 AVX512] [62/n] Add vpmaddubsw,vdbpsadbw insn patterns.


Hello UroÅ,
On 29 Sep 10:08, Uros Bizjak wrote:
> On Fri, Sep 26, 2014 at 4:09 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> > +(define_insn "avx512bw_pmaddubsw512<mode><mask_name>"
> > +  [(set (match_operand:VI2_AVX512VL 0 "register_operand" "=v")
> > +          (unspec:VI2_AVX512VL
> > +            [(match_operand:<dbpsadbwmode> 1 "register_operand" "v")
> > +             (match_operand:<dbpsadbwmode> 2 "nonimmediate_operand" "vm")]
> > +             UNSPEC_PMADDUBSW512))]
> > +   "TARGET_AVX512BW"
> > +   "vpmaddubsw\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}";
> > +  [(set_attr "type" "sseiadd")
> > +   (set_attr "prefix" "evex")
> > +   (set_attr "mode" "XI")])
> > +
> Can the one above be described using standard RTX, perhaps something
> similar to avx2_pmaddubsw256?
Definetely, it can. We didn't do that because final pattern will be
twice as long as 256-bit variant resulting to 96 (!) lines and I think
in near future auto-vect won't pick MADD at all.
But if you think that it will be better to have explicit RTX, I ready to do that!

--
Thanks, K


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