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[PATCH i386 AVX512] [23/n] Add vcvtps2[u]qq patterns.
- From: Kirill Yukhin <kirill dot yukhin at gmail dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>
- Cc: Jakub Jelinek <jakub at redhat dot com>, Richard Henderson <rth at redhat dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>, kirill dot yukhin at gmail dot com
- Date: Wed, 27 Aug 2014 16:04:30 +0400
- Subject: [PATCH i386 AVX512] [23/n] Add vcvtps2[u]qq patterns.
- Authentication-results: sourceware.org; auth=none
Hello,
This patch introduces support for vcvtps2[u]qq.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_mode_iterator VI8_256_512): New.
(define_insn "<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>"):
Ditto.
(define_insn "<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>"): Ditto.
(define_insn "<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>"):
Ditto.
(define_insn "<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>"): Ditto.
--
Thanks, K
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index c0a79df..5904450 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -278,6 +278,9 @@
(define_mode_iterator VI8_AVX512VL
[V8DI (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
+(define_mode_iterator VI8_256_512
+ [V8DI (V4DI "TARGET_AVX512VL")])
+
(define_mode_iterator VI1_AVX2
[(V32QI "TARGET_AVX2") V16QI])
@@ -3911,6 +3914,52 @@
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
+(define_insn "<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>"
+ [(set (match_operand:VI8_256_512 0 "register_operand" "=v")
+ (unspec:VI8_256_512 [(match_operand:<ssePSmode2> 1 "nonimmediate_operand" "<round_constraint>")]
+ UNSPEC_FIX_NOTRUNC))]
+ "TARGET_AVX512DQ && <round_mode512bit_condition>"
+ "vcvtps2qq\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "prefix" "evex")
+ (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>"
+ [(set (match_operand:V2DI 0 "register_operand" "=v")
+ (unspec:V2DI
+ [(vec_select:V2SF
+ (match_operand:V4SF 1 "nonimmediate_operand" "vm")
+ (parallel [(const_int 0) (const_int 1)]))]
+ UNSPEC_FIX_NOTRUNC))]
+ "TARGET_AVX512DQ && TARGET_AVX512VL"
+ "vcvtps2qq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "prefix" "evex")
+ (set_attr "mode" "TI")])
+
+(define_insn "<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>"
+ [(set (match_operand:VI8_256_512 0 "register_operand" "=v")
+ (unspec:VI8_256_512 [(match_operand:<ssePSmode2> 1 "nonimmediate_operand" "<round_constraint>")]
+ UNSPEC_UNSIGNED_FIX_NOTRUNC))]
+ "TARGET_AVX512DQ && <round_mode512bit_condition>"
+ "vcvtps2uqq\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "prefix" "evex")
+ (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>"
+ [(set (match_operand:V2DI 0 "register_operand" "=v")
+ (unspec:V2DI
+ [(vec_select:V2SF
+ (match_operand:V4SF 1 "nonimmediate_operand" "vm")
+ (parallel [(const_int 0) (const_int 1)]))]
+ UNSPEC_UNSIGNED_FIX_NOTRUNC))]
+ "TARGET_AVX512DQ && TARGET_AVX512VL"
+ "vcvtps2uqq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "prefix" "evex")
+ (set_attr "mode" "TI")])
+
(define_insn "<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>"
[(set (match_operand:V16SI 0 "register_operand" "=v")
(any_fix:V16SI