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Re: [PATCH i386 AVX512] [2/n] Introduce `-mavx512bw' switch
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: Kirill Yukhin <kirill dot yukhin at gmail dot com>
- Cc: Jakub Jelinek <jakub at redhat dot com>, Richard Henderson <rth at redhat dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 11 Aug 2014 08:57:18 +0200
- Subject: Re: [PATCH i386 AVX512] [2/n] Introduce `-mavx512bw' switch
- Authentication-results: sourceware.org; auth=none
- References: <20140808123121 dot GB45684 at msticlxl57 dot ims dot intel dot com>
On Fri, Aug 8, 2014 at 2:31 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> This patch introduces `-mavx512bw' compiler switch.
> Bootstrapped.
>
> gcc/
> * common/config/i386/i386-common.c
> (OPTION_MASK_ISA_AVX512BW_SET) : Define.
> (OPTION_MASK_ISA_AVX512BW_UNSET): Ditto.
> (OPTION_MASK_ISA_AVX512VL_UNSET) : Ditto.
> (ix86_handle_option): Handle OPT_mavx512bw.
> * config/i386/cpuid.h (bit_AVX512BW): Define.
> * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512bw,
> set -mavx512bw accordingly.
> * config/i386/i386-c.c (ix86_target_macros_internal): Handle
> OPTION_MASK_ISA_AVX512BW.
> * config/i386/i386.c (ix86_target_string): Handle -mavx512bw.
> (ix86_option_override_internal): Define PTA_AVX512BW, handle
> PTA_AVX512BW and OPTION_MASK_ISA_AVX512BW.
> (ix86_valid_target_attribute_inner_p): Handle OPT_mavx512bw.
> * config/i386/i386.h (TARGET_AVX512BW): Define.
> (TARGET_AVX512BW_P(x)): Ditto.
> * config/i386/i386.opt: Add mavx512bw.
>
> Is it ok for trunk?
OK with a small change below.
Thanks,
Uros.
> diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
> index 3db1535..a2e94d5 100644
> --- a/gcc/common/config/i386/i386-common.c
> +++ b/gcc/common/config/i386/i386-common.c
> @@ -67,6 +67,8 @@ along with GCC; see the file COPYING3. If not see
> (OPTION_MASK_ISA_AVX512ER | OPTION_MASK_ISA_AVX512F_SET)
> #define OPTION_MASK_ISA_AVX512DQ_SET \
> (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512F_SET)
> +#define OPTION_MASK_ISA_AVX512BW_SET \
> + (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512F_SET)
> #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
> #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
> #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
> @@ -159,6 +161,8 @@ along with GCC; see the file COPYING3. If not see
> #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
> #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
> #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
> +#define OPTION_MASK_ISA_AVX512BW_UNSET OPTION_MASK_ISA_AVX512BW
> +#define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
The line above belongs to 3/n pach.