Re: [PATCH, ARM] Keep constants in register when expanding

[Ramana Radhakrishnan <ramana dot gcc at googlemail dot com>]

On Tue, Aug 5, 2014 at 10:31 AM, Zhenqiang Chen
<zhenqiang.chen@linaro.org> wrote:
> Hi,
>
> For some large constants, ARM will split them during expanding, which
> makes impossible to hoist them out the loop or shared by different
> references (refer the test case in the patch).
>
> The patch keeps some constants in registers. If the constant can not
> be optimized, the cprop and combine passes can optimize them as what
> we do in current expand pass with
>
> define_insn_and_split "*arm_subsi3_insn"
> define_insn_and_split "*arm_andsi3_insn"
> define_insn_and_split "*iorsi3_insn"
> define_insn_and_split "*arm_xorsi3"
>
> The patch does not modify addsi3 since the define_insn_and_split
> "*arm_addsi3" is only valid when (reload_completed ||
> !arm_eliminable_register (operands[1])). The cprop and combine passes
> can not optimize the large constant if we put it in register, which
> will lead to regression.
>
> For logic operators, the patch skips changes for constants:
>
> INTVAL (operands[2]) < 0 && const_ok_for_arm (-INTVAL (operands[2])
>
> since expand pass always uses "sign-extend" to get the value
> (trunc_int_for_mode called from immed_wide_int_const) for rtl, and
> logs show most negative values are UNSIGNED when they are TREE node.
> And combine pass is smart enough to recover the negative value to
> positive value.

I am unable to verify any change in code generation for this testcase
with and without the patch when I had a play with the patch.

what gives ?

Ramana


>
> Bootstrap and no make check regression on Chrome book.
> For coremark, dhrystone and eembcv1, no any code size and performance
> change on Cortex-M4.
> No any file in CSiBE has code size change for Cortex-A15 and Cortex-M4.
> No Spec2000 performance regression on Chrome book and dumped assemble
> codes only show very few difference.
>
> OK for trunk?
>
> Thanks!
> -Zhenqiang
>
> ChangeLog:
> 2014-08-05  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
>
>         * config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3): Keep some
>         large constants in register other than split them.
>
> testsuite/ChangeLog:
> 2014-08-05  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
>
>         * gcc.target/arm/maskdata.c: New test.