This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [RFC: Patch, PR 60102] [4.9/4.10 Regression] powerpc fp-bit ices at dwf_regno
- From: David Edelsohn <dje dot gcc at gmail dot com>
- To: "rohitarulraj at freescale dot com" <rohitarulraj at freescale dot com>
- Cc: Ulrich Weigand <uweigand at de dot ibm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Edmar Wienskoski <edmar at freescale dot com>, Alan Modra <amodra at gmail dot com>, Jakub Jelinek <jakub at redhat dot com>
- Date: Fri, 1 Aug 2014 21:46:36 -0400
- Subject: Re: [RFC: Patch, PR 60102] [4.9/4.10 Regression] powerpc fp-bit ices at dwf_regno
- Authentication-results: sourceware.org; auth=none
- References: <e1ed4a3799764ae482037722effa1303 at BN1PR0301MB0644 dot namprd03 dot prod dot outlook dot com> <201408011428 dot s71ESvBE005167 at d06av02 dot portsmouth dot uk dot ibm dot com> <9ffea8b9e44144208d66d2a5795438ba at BN1PR0301MB0644 dot namprd03 dot prod dot outlook dot com>
On Fri, Aug 1, 2014 at 2:03 PM, rohitarulraj@freescale.com
<rohitarulraj@freescale.com> wrote:
> Hello Ulrich,
>
> Thanks.
>
>> > /* Use gcc hard register numbering for eh_frame. */ -#define
>> >DWARF_FRAME_REGNUM(REGNO) (REGNO)
>> >+#define DWARF_FRAME_REGNUM(REGNO) \
>> >+ ((REGNO) >= FIRST_SPE_HIGH_REGNO ? ((REGNO) -
>> FIRST_SPE_HIGH_REGNO +
>> >+1200) : (REGNO))
>>
>> Any reason for not using SPE_HIGH_REGNO_P here, just in case we do get
>> other hard registers at some point?
>
> Yes, we can use it. I just have to move the definition of "SPE_HIGH_REGNO_P" macro before "DWARF_FRAME_REGNUM" macro definition.
> [Previously, I had defined and placed "SPE_HIGH_REGNO_P" macro along with similar macros "ALTIVEC_REGNO_P" etc.]
>
> I had updated the patch as required (For this last change, I have checked/tested only the builds: ppc64 trunk, e500v2 v4.9.1 bareboard & linux build).
>
> PR target/60102
>
> [libgcc]
> 2014-07-31 Rohit <rohitarulraj@freescale.com>
> * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Update
> based on change in SPE high register numbers and 3 HTM registers.
>
> [gcc]
> 2014-07-31 Rohit <rohitarulraj@freescale.com>
> * config/rs6000/rs6000.c
> (rs6000_reg_names) : Add SPE high register names.
> (alt_reg_names) : Likewise.
> (rs6000_dwarf_register_span) : For SPE high registers, replace
> dwarf register numbers with GCC hard register numbers.
> (rs6000_init_dwarf_reg_sizes_extra) : Likewise.
> (rs6000_dbx_register_number): For SPE high registers, return dwarf
> register number for the corresponding GCC hard register number.
>
> * config/rs6000/rs6000.h
> (FIRST_PSEUDO_REGISTER) : Update based on 32 newly added GCC hard
> register numbers for SPE high registers.
> (DWARF_FRAME_REGISTERS) : Likewise.
> (DWARF_REG_TO_UNWIND_COLUMN) : Likewise.
> (DWARF_FRAME_REGNUM) : Likewise.
> (FIXED_REGISTERS) : Likewise.
> (CALL_USED_REGISTERS) : Likewise.
> (CALL_REALLY_USED_REGISTERS) : Likewise.
> (REG_ALLOC_ORDER) : Likewise.
> (enum reg_class) : Likewise.
> (REG_CLASS_NAMES) : Likewise.
> (REG_CLASS_CONTENTS) : Likewise.
> (SPE_HIGH_REGNO_P) : New macro to identify SPE high registers.
>
> * gcc.target/powerpc/pr60102.c: New testcase.
The patch is okay with me if Uli is satisfied.
Thanks, David