Re: [PATCH,MIPS] MIPS64r6 support

[Richard Sandiford <rdsandiford at googlemail dot com>]

Matthew Fortune <Matthew.Fortune@imgtec.com> writes:
>> I suppose we'll need a way of specifying an isa_rev range, say
>> "isa_rev=2-5".  That should be a fairly localised change though.
>
> There appear to be about 9 tests that are not fixed by educating mips.exp
> about flags which are not supported on R6. Steve has initially dealt with
> these via forbid_cpu=mips.*r6 but I guess it would be cleaner to try and
> support an isa_rev range. I'll see we can club together enough tcl skills
> to write it :-)

Thanks.  I saw the patch Steve posted later, but I'm running out of
time to look at it today.  Hopefully tomorrow.

>> >     (if_then_else (match_test "TARGET_MICROMIPS")
>> >  		 (match_test "umips_12bit_offset_address_p (op, mode)")
>> > -		 (match_test "mips_address_insns (op, mode, false)")))
>> > +		 (if_then_else (match_test "ISA_HAS_PREFETCH_9BIT")
>> > +			(match_test "mipsr6_9bit_offset_address_p (op, mode)")
>> > +			(match_test "mips_address_insns (op, mode, false)"))))
>>
>> Please use (cond ...) instead.
>
> It seems I cannot use cond in a predicate expression, so I've had to
> leave it as is.

Code outside config/mips can be changed too though.  Try the attached.

>> > diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h
>> > index e539422..751623f 100644
>> > --- a/gcc/config/mips/linux.h
>> > +++ b/gcc/config/mips/linux.h
>> > @@ -18,8 +18,9 @@ along with GCC; see the file COPYING3.  If not see
>> >  <http://www.gnu.org/licenses/>.  */
>> >
>> >  #define GLIBC_DYNAMIC_LINKER \
>> > -  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
>> > +  "%{mnan=2008|mips32r6|mips64r6:/lib/ld-linux-
>> mipsn8.so.1;:/lib/ld.so.1}"
>> >
>> >  #undef UCLIBC_DYNAMIC_LINKER
>> >  #define UCLIBC_DYNAMIC_LINKER \
>> > -  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
>> > +  "%{mnan=2008|mips32r6|mips64r6:/lib/ld-uClibc-mipsn8.so.0;" \
>> > +  ":/lib/ld-uClibc.so.0}"
>> 
>> Rather than update all the specs like this, I think we should force
>> -mnan=2008 onto the command line for r6 using DRIVER_SELF_SPECS.
>> See e.g. MIPS_ISA_SYNCI_SPEC.
>
> I agree this could be simpler and your comment has made me realise the
> implementation in the patch is wrong for configurations like
> mipsisa32r6-unknown-linux-gnu. The issue for both the current patch and
> your suggestion is that they rely on MIPS_ISA_LEVEL_SPEC having been
> applied but this only happens in the vendor triplets. The --with-arch*
> options used with mips-unknown-linux-gnu would be fine as they place
> an arch option on the command line.
>
> If I add MIPS_ISA_LEVEL_SPEC to the DRIVER_SELF_SPECS generic
> definition in mips.h then I believe that would fix the problem. Any new
> spec I add for R6/nan setting would also need adding to the generic
> DRIVER_SELF_SPECS in mips.h and any vendor definitions of
> DRIVER_SELF_SPECS.

Yeah, sounds like the right way to go.

Richard


gcc/
	* genattrtab.c (check_attr_value): Move COND length check to...
	* read-rtl.c (read_rtx_code): ...here.
	* gensupport.c (expand_conds): New function.
	(process_rtx): Use it on predicate and constraint conditions.

Index: gcc/genattrtab.c
===================================================================
--- gcc/genattrtab.c	2014-06-24 23:14:49.140002614 +0100
+++ gcc/genattrtab.c	2014-06-24 23:14:49.361004899 +0100
@@ -997,13 +997,6 @@ check_attr_value (rtx exp, struct attr_d
       break;
 
     case COND:
-      if (XVECLEN (exp, 0) % 2 != 0)
-	{
-	  error_with_line (attr->lineno,
-			   "first operand of COND must have even length");
-	  break;
-	}
-
       for (i = 0; i < XVECLEN (exp, 0); i += 2)
 	{
 	  XVECEXP (exp, 0, i) = check_attr_test (XVECEXP (exp, 0, i),
Index: gcc/read-rtl.c
===================================================================
--- gcc/read-rtl.c	2014-06-24 23:14:49.141002624 +0100
+++ gcc/read-rtl.c	2014-06-24 23:14:49.363004920 +0100
@@ -1350,6 +1350,9 @@ read_rtx_code (const char *code_name)
 	gcc_unreachable ();
       }
 
+  if (code == COND && XVECLEN (return_rtx, 0) % 2 != 0)
+    fatal_with_file_and_line ("first operand of COND must have even length");
+
   if (CONST_WIDE_INT_P (return_rtx))
     {
       read_name (&name);
Index: gcc/gensupport.c
===================================================================
--- gcc/gensupport.c	2014-06-24 23:14:49.140002614 +0100
+++ gcc/gensupport.c	2014-06-24 23:21:35.389211427 +0100
@@ -143,6 +143,44 @@ gen_rtx_CONST_INT (enum machine_mode ARG
   XWINT (rt, 0) = arg;
   return rt;
 }
+
+/* Expand CONDs in *LOC to IF_THEN_ELSEs.  */
+
+static void
+expand_conds (rtx *loc)
+{
+  rtx x = *loc;
+
+  if (GET_CODE (x) == COND)
+    {
+      *loc = XEXP (x, 1);
+      for (int i = XVECLEN (x, 0) - 2; i >= 0; i -= 2)
+	{
+	  rtx cond = rtx_alloc (IF_THEN_ELSE);
+	  XEXP (cond, 0) = XVECEXP (x, 0, i);
+	  XEXP (cond, 1) = XVECEXP (x, 0, i + 1);
+	  XEXP (cond, 2) = *loc;
+	  *loc = cond;
+	}
+      x = *loc;
+    }
+
+  const char *format_ptr = GET_RTX_FORMAT (GET_CODE (x));
+  for (int i = 0; i < GET_RTX_LENGTH (GET_CODE (x)); i++)
+    switch (*format_ptr++)
+      {
+      case 'e':
+      case 'u':
+	expand_conds (&XEXP (x, i));
+	break;
+      case 'E':
+	if (XVEC (x, i) != NULL)
+	  for (int j = 0; j < XVECLEN (x, i); j++)
+	    expand_conds (&XVECEXP (x, i, j));
+	break;
+      }
+}
+
 
 /* Predicate handling.
 
@@ -506,13 +544,17 @@ process_rtx (rtx desc, int lineno)
 
     case DEFINE_PREDICATE:
     case DEFINE_SPECIAL_PREDICATE:
+      expand_conds (&XEXP (desc, 1));
       process_define_predicate (desc, lineno);
-      /* Fall through.  */
+      queue_pattern (desc, &define_pred_tail, read_md_filename, lineno);
+      break;
 
     case DEFINE_CONSTRAINT:
-    case DEFINE_REGISTER_CONSTRAINT:
     case DEFINE_MEMORY_CONSTRAINT:
     case DEFINE_ADDRESS_CONSTRAINT:
+      expand_conds (&XEXP (desc, 2));
+      /* Fall through.  */
+    case DEFINE_REGISTER_CONSTRAINT:
       queue_pattern (desc, &define_pred_tail, read_md_filename, lineno);
       break;