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Re: [GCC RFC]A new and simple pass merging paired load store instructions
- From: Mike Stump <mikestump at comcast dot net>
- To: Jeff Law <law at redhat dot com>
- Cc: "bin.cheng" <bin dot cheng at arm dot com>, gcc-patches at gcc dot gnu dot org
- Date: Thu, 15 May 2014 11:41:44 -0700
- Subject: Re: [GCC RFC]A new and simple pass merging paired load store instructions
- Authentication-results: sourceware.org; auth=none
- References: <004d01cf700e$ef1e30e0$cd5a92a0$ at arm dot com> <32B4330F-1D0F-4D4E-BF7A-2E5B2148B893 at comcast dot net> <5374F59D dot 3030101 at redhat dot com>
On May 15, 2014, at 10:13 AM, Jeff Law <law@redhat.com> wrote:
> I've poked at the scheduler several times to do similar stuff, but was never really satisfied with the results and never tried to polish those prototypes into something worth submitting.
What was lacking? The cleanliness of the patch or the, it didn’t win me more than 0.01% code improvement so I never submitted it?
> One example I've poked at was discovery of stores which then feed into a load from the same location.
Trivial to do with my patch, just change the sort key to arrange that to happen, however, if you want multiple support and this, then, you need to recognize store_m / load from a part of that, which would be kinda annoying.
> Anyway, if you want to move forward with the idea, I'd certainly support doing so.
I’d be happy to clean up my patch as necessary and contribute it, however, people would have to tell me what they would like to see done to it. In my mind, the arm, more, nds32, rs6000 and s390 ports would be the biggest in tree winners.
To be the most useful, my patch would benefit from an optimization person writing MI code to coalesce adjacent memory operations into either larger mode load and stores or into gen_load_multiple, gen_store_multiplethen, then all the port work (mine is around 16*n*n lines) would be zero.