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RE: [PATCH, MIPS] Alter default number of single-precision registers
- From: Matthew Fortune <Matthew dot Fortune at imgtec dot com>
- To: Richard Sandiford <rdsandiford at googlemail dot com>
- Cc: "'gcc-patches at gcc dot gnu dot org' (gcc-patches at gcc dot gnu dot org)" <gcc-patches at gcc dot gnu dot org>, Rich Fuhler <Rich dot Fuhler at imgtec dot com>, "qiuji at loongson dot cn" <qiuji at loongson dot cn>
- Date: Wed, 7 May 2014 19:31:51 +0000
- Subject: RE: [PATCH, MIPS] Alter default number of single-precision registers
- Authentication-results: sourceware.org; auth=none
- References: <6D39441BF12EF246A7ABCE6654B0235351A231 at LEMAIL01 dot le dot imgtec dot org> <87siove2oo dot fsf at talisman dot default> <6D39441BF12EF246A7ABCE6654B0235351BB28 at LEMAIL01 dot le dot imgtec dot org> <87oazjdz6l dot fsf at talisman dot default> <6D39441BF12EF246A7ABCE6654B0235351BDD2 at LEMAIL01 dot le dot imgtec dot org> <87tx914cuo dot fsf at talisman dot default>
Richard Sandiford <rdsandiford@googlemail.com> writes:
> Matthew Fortune <Matthew.Fortune@imgtec.com> writes:
> > diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-6.c
> b/gcc/testsuite/gcc.target/mips/oddspreg-6.c
> > new file mode 100644
> > index 0000000..2d1b129
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/mips/oddspreg-6.c
> > @@ -0,0 +1,15 @@
> > +/* Check that we disable odd-numbered single precision registers and can
> > + still generate code. */
> > +/* { dg-options "-mabi=64 -mno-odd-spreg -mhard-float" } */
>
> "Check that we enable odd-numbered single precision registers." for this one?
Yes.
> OK otherwise once the copyright is sorted out, thanks.
>
> Richard