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Re: [PATCH, rs6000] Improve TImode add/sub
- From: segher at kernel dot crashing dot org
- To: Pat Haugen <pthaugen at linux dot vnet dot ibm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, David Edelsohn <dje dot gcc at gmail dot com>
- Date: Tue, 8 Apr 2014 21:56:35 -0500
- Subject: Re: [PATCH, rs6000] Improve TImode add/sub
- Authentication-results: sourceware.org; auth=none
- References: <53448F22 dot 6000309 at linux dot vnet dot ibm dot com>
Hello,
On Tue, Apr 08, 2014 at 07:06:58PM -0500, Pat Haugen wrote:
> The following patch improves the code generated for TImode add/sub so
> that we now generate a 2 insn sequence which makes use of the carry bit.
> +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
> +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
Please leave out the default arguments. Why does this need skipping
on Darwin?
> +;; Define the TImode operations that can be done in a small number
> +;; of instructions. The & constraints are to prevent the register
> +;; allocator from allocating registers that overlap with the inputs
> +;; (for example, having an input in 7,8 and an output in 6,7). We
> +;; also allow for the output being the same as one of the inputs.
> +
> +(define_insn "addti3"
> + [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,&r,r,r")
> + (plus:TI (match_operand:TI 1 "gpc_reg_operand" "%r,r,0,0")
> + (match_operand:TI 2 "reg_or_short_operand" "r,I,r,I")))]
> + "TARGET_POWERPC64"
That's not the correct condition: the carry bit is set based on the 32-bit
carry in 32-bit mode, so the condition has to be TARGET_64BIT.
The adddi3 pattern has !TARGET_POWERPC64 since a 64-bit addition can
be done without addc on a 64-bit machine, no matter what mode the CPU
is in.
> + "*
> +{
Might as well leave out this stuff on new code, just use the braces :-)
Segher