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Re: [PATCH][ARM][3/3] Recognise bitwise operations leading to SImode rev16
- From: Ramana Radhakrishnan <ramana dot gcc at googlemail dot com>
- To: Kyrill Tkachov <kyrylo dot tkachov at arm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, Ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Fri, 28 Mar 2014 14:19:22 +0000
- Subject: Re: [PATCH][ARM][3/3] Recognise bitwise operations leading to SImode rev16
- Authentication-results: sourceware.org; auth=none
- References: <532969CA dot 8020903 at arm dot com>
- Reply-to: ramrad01 at arm dot com
On Wed, Mar 19, 2014 at 9:56 AM, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
> Hi all,
>
> This is the arm equivalent of patch [2/3] in the series that adds combine
> patterns for the bitwise operations leading to a rev16 instruction.
> It reuses the functions that were put in aarch-common.c to properly cost
> these operations.
>
> I tried matching a DImode rev16 (with the intent of splitting it into two
> rev16 ops) like aarch64 but combine wouldn't try to match that bitwise
> pattern in DImode like aarch64 does. Instead it tries various exotic
> combinations with subregs.
>
> Tested arm-none-eabi, bootstrap on arm-none-linux-gnueabihf.
>
> Ok for stage1?
This is OK for stage1 .
Ramana
>
> [gcc/]
> 2014-03-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>
> * config/arm/arm.md (arm_rev16si2): New pattern.
> (arm_rev16si2_alt): Likewise.
> * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
>
>
> [gcc/testsuite/]
> 2014-03-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>
> * gcc.target/arm/rev16.c: New test.