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Hi Marcus, On 14 March 2014 19:42, Marcus Shawcroft <marcus.shawcroft@gmail.com> wrote: > Hi Venkat > > On 5 February 2014 10:29, Venkataramanan Kumar > <venkataramanan.kumar@linaro.org> wrote: >> Hi Marcus, >> >>> + "ldr\\t%x2, %1\;str\\t%x2, %0\;mov\t%x2,0" >>> + [(set_attr "length" "12")]) >>> >>> This pattern emits an opaque sequence of instructions that cannot be >>> scheduled, is that necessary? Can we not expand individual >>> instructions or at least split ? >> >> Almost all the ports emits a template of assembly instructions. >> I m not sure why they have to be generated this way. >> But usage of these pattern is to clear the register that holds canary >> value immediately after its usage. > > I've just read the thread Andrew pointed out, thanks, I'm happy that > there is a good reason to do it this way. Andrew, thanks for > providing the background. > > + [(set_attr "length" "12")]) > + > > These patterns should also set the "type" attribute, a reasonable > value would be "multiple". > I have incorporated your review comments and split the patch into two. The first patch attached here contains Aarch64 machine descriptions for the stack protect patterns. ChangeLog. 2014-03-19 Venkataramanan Kumar <venkataramanan.kumar@linaro.org> * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test) (stack_protect_set_<mode>, stack_protect_test_<mode>): Add machine descriptions for Stack Smashing Protector. Tested for aarch64-none-linux-gnu target under QEMU . regards, Venkat.
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