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[AArch64 07/14] Define additional patterns for adds/subs.
- From: Philipp Tomsich <philipp dot tomsich at theobroma-systems dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: philipp dot tomsich at theobroma-systems dot com
- Date: Tue, 18 Feb 2014 22:09:40 +0100
- Subject: [AArch64 07/14] Define additional patterns for adds/subs.
- Authentication-results: sourceware.org; auth=none
- References: <1392757787-25629-1-git-send-email-philipp dot tomsich at theobroma-systems dot com>
---
gcc/config/aarch64/aarch64.md | 49 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 90f1ee9..13a75d3 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1138,6 +1138,22 @@
[(set_attr "type" "alus_reg,alus_imm,alus_imm")]
)
+;; alternative using the condition output only
+(define_insn "*add<mode>3_compare0_internal2"
+ [(set (reg:CC_NZ CC_REGNUM)
+ (compare:CC_NZ
+ (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r,r")
+ (match_operand:GPI 2 "aarch64_plus_operand" "r,I,J"))
+ (const_int 0)))
+ (clobber (match_scratch:GPI 0 "=r,r,r"))]
+ ""
+ "@
+ adds\\t%<w>0, %<w>1, %<w>2
+ adds\\t%<w>0, %<w>1, %<w>2
+ subs\\t%<w>0, %<w>1, #%n2"
+ [(set_attr "type" "alus_reg,alus_imm,alus_imm")]
+)
+
;; zero_extend version of above
(define_insn "*addsi3_compare0_uxtw"
[(set (reg:CC_NZ CC_REGNUM)
@@ -1155,6 +1171,39 @@
[(set_attr "type" "alus_reg,alus_imm,alus_imm")]
)
+;; variant of the above using a swapped condition/comparator
+(define_insn "*addsi3_compare0_uxtw_zeswp"
+ [(set (reg:CC_ZESWP CC_REGNUM)
+ (compare:CC_ZESWP
+ (plus:SI (match_operand:SI 1 "register_operand" "%r,r,r")
+ (match_operand:SI 2 "aarch64_plus_operand" "r,I,J"))
+ (const_int 0)))
+ (set (match_operand:DI 0 "register_operand" "=r,r,r")
+ (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
+ ""
+ "@
+ adds\\t%w0, %w1, %w2
+ adds\\t%w0, %w1, %w2
+ subs\\t%w0, %w1, #%n2"
+ [(set_attr "type" "alus_reg,alus_imm,alus_imm")]
+)
+
+;; alternative using the condition output only
+(define_insn "*addsi3_compare0_uxtw_zeswp_internal2"
+ [(set (reg:CC_ZESWP CC_REGNUM)
+ (compare:CC_ZESWP
+ (plus:SI (match_operand:SI 1 "register_operand" "%r,r,r")
+ (match_operand:SI 2 "aarch64_plus_operand" "r,I,J"))
+ (const_int 0)))
+ (clobber (match_scratch:DI 0 "=r,r,r"))]
+ ""
+ "@
+ adds\\t%w0, %w1, %w2
+ adds\\t%w0, %w1, %w2
+ subs\\t%w0, %w1, #%n2"
+ [(set_attr "type" "alus_reg,alus_imm,alus_imm")]
+)
+
(define_insn "*adds_mul_imm_<mode>"
[(set (reg:CC_NZ CC_REGNUM)
(compare:CC_NZ
--
1.9.0