This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: PATCH: PR target/59672: Add -m16 support for x86
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Richard Biener <rguenther at suse dot de>
- Cc: Uros Bizjak <ubizjak at gmail dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Jakub Jelinek <jakub at redhat dot com>
- Date: Wed, 29 Jan 2014 05:57:09 -0800
- Subject: Re: PATCH: PR target/59672: Add -m16 support for x86
- Authentication-results: sourceware.org; auth=none
- References: <20140127194457 dot GA12183 at intel dot com> <CAFULd4YBgcMtNVX8_7yYJ_7NStPu+g0axqhBJLeUTazfwRTnSA at mail dot gmail dot com> <alpine dot LSU dot 2 dot 11 dot 1401291048560 dot 469 at zhemvz dot fhfr dot qr>
On Wed, Jan 29, 2014 at 1:52 AM, Richard Biener <rguenther@suse.de> wrote:
> On Tue, 28 Jan 2014, Uros Bizjak wrote:
>
>> On Mon, Jan 27, 2014 at 8:44 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>>
>> > The .code16gcc directive was added to binutils back in 1999:
>> >
>> > ---
>> > '.code16gcc' provides experimental support for generating 16-bit code
>> > from gcc, and differs from '.code16' in that 'call', 'ret', 'enter',
>> > 'leave', 'push', 'pop', 'pusha', 'popa', 'pushf', and 'popf'
>> > instructions default to 32-bit size. This is so that the stack pointer
>> > is manipulated in the same way over function calls, allowing access to
>> > function parameters at the same stack offsets as in 32-bit mode.
>> > '.code16gcc' also automatically adds address size prefixes where
>> > necessary to use the 32-bit addressing modes that gcc generates.
>> > ---
>> >
>> > It encodes 32-bit assembly instructions generated by GCC in 16-bit format
>> > so that GCC can be used to generate 16-bit instructions. To do that, the
>> > .code16gcc directive may be placed at the very beginning of the assembly
>> > code. This patch adds -m16 to x86 backend by:
>> >
>> > 1. Add -m16 and make it mutually exclusive with -m32, -m64 and -mx32.
>> > 2. Treat -m16 like -m32 so that --32 is passed to assembler.
>> > 3. Output .code16gcc at the very beginning of the assembly code.
>> > 4. Turn off 64-bit ISA when -m16 is used.
>> >
>> > Tested on Linux/x86 and Linux/x86-64. OK for trunk?
>> >
>> > Thanks.
>> >
>> > H.J.
>> > ---
>> > PR target/59672
>> > * config/i386/gnu-user64.h (SPEC_32): Add "m16|" to "m32".
>> > (SPEC_X32): Likewise.
>> > (SPEC_64): Likewise.
>> > * config/i386/i386.c (ix86_option_override_internal): Turn off
>> > OPTION_MASK_ISA_64BIT, OPTION_MASK_ABI_X32 and OPTION_MASK_ABI_64
>> > for TARGET_16BIT.
>> > (x86_file_start): Output .code16gcc for TARGET_16BIT.
>> > * config/i386/i386.h (TARGET_16BIT): New macro.
>> > (TARGET_16BIT_P): Likewise.
>> > * config/i386/i386.opt: Add m16.
>> > * doc/invoke.texi: Document -m16.
>>
>> OK for mainline, needs OK from RMs for a backport.
>
> I don't think this is suitable for the branch. Unless there is
> tremendous need for it somewhere ...? I like the suggested
Linux kernel people want it and clang has it.
> addition of a --code16gcc assembler flag. Please make sure to
> document the minimum required binutils to make this work.
>
Since the .code16gcc directive was added to binutils back in 1999,
it is older than the minimum binutils required for x86 GCC. There
is no need to specify a separate minimum binutils for it.
--
H.J.