Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Kirill Yukhin <kirill dot yukhin at gmail dot com>]

Hello UroÅ,
On 18 Dec 18:16, Uros Bizjak wrote:
> +/* Walk through insns sequence or pattern and erase rounding mentions.
> +   Main transformation is performed in ix86_erase_embedded_rounding_1.  */
> +static rtx
> +ix86_erase_embedded_rounding (rtx pat)
> 
> All calls to this function are made with insn pattern, so we can
> remove this function and use ix86_erase_embedded_rounding_1 directly
> instead. The function to handle sequences can be re-introduced when
> needed, probably in a later patch.
The problem is that any define_expand is ultimately insn_sequence, e.g.:
rtx
gen_addv16sf3 (rtx operand0,
        rtx operand1,
        rtx operand2)
{
  rtx _val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
ix86_fixup_binary_operands_no_copy (PLUS, V16SFmode, operands);
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (VOIDmode,
        operand0,
        gen_rtx_PLUS (V16SFmode,
        operand1,
        operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

While for define_insn we have:
rtx
gen_avx512f_getexpv16sf (rtx operand0 ATTRIBUTE_UNUSED,
        rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (VOIDmode,
        operand0,
        gen_rtx_UNSPEC (V16SFmode,
        gen_rtvec (1,
                operand1),
        148));
}
Which is actually not an INSN.

As far as we have all that sequences size equal to 1, we may replace these
two routines with single + simple check:
  static rtx
  ix86_erase_embedded_rounding (rtx pat)
  {
    if (GET_CODE (pat) == INSN)
      pat = PATTERN (pat);
  ...

I am testing attached patch. If no objections - I'll commit it tomorrow
(Moscow time).

--
Thanks, K

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