Re: [ARM] Fix register r3 wrongly used to save ip in nested APCS frame

[Eric Botcazou <ebotcazou at adacore dot com>]

> This generates:
> 
> 	sub	sp, sp, #n
> 	str	ip, [sp]
> 
> which can be done in one instruction, vis:
> 
> 	str	ip, [sp, #-n]!
> 
> Very similar code to do this essentially already exists a few lines
> earlier (in the args_to_push == 0 case), but needs tweaking to use
> pre-modify rather than pre-dec when n != 4.

Thanks for the hint, I obviously don't think the ARM way yet...

> I'll pre-approve a patch that makes that change.

Revised patch attached.  It generates:

        @ Nested: function declared inside another function.
        @ args = 8, pretend = 4, frame = 0
        @ frame_needed = 1, uses_anonymous_args = 0
        str     ip, [sp, #-4]!
        add     ip, sp, #4
        stmfd   sp!, {fp, ip, lr, pc}
        sub     fp, ip, #8
        ldr     ip, [fp, #4]

on arm-vxworks and:

        @ Function supports interworking.
        @ Nested: function declared inside another function.
        @ args = 12, pretend = 8, frame = 0
        @ frame_needed = 1, uses_anonymous_args = 0
        str     ip, [sp, #-8]!
        add     ip, sp, #8
        stmfd   sp!, {fp, ip, lr, pc}
        sub     fp, ip, #12
        ldr     ip, [fp, #4]

on arm-eabi and your testcase passes with it.  I'll test it over the next few 
days and install it on mainline if everything is as expected.

-- 
Eric Botcazou

Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 206105)
+++ config/arm/arm.c	(working copy)
@@ -18674,8 +18674,7 @@ arm_r3_live_at_start_p (void)
   /* Just look at cfg info, which is still close enough to correct at this
      point.  This gives false positives for broken functions that might use
      uninitialized data that happens to be allocated in r3, but who cares?  */
-  return REGNO_REG_SET_P (df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
-			  3);
+  return REGNO_REG_SET_P (df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)), 3);
 }
 
 /* Compute the number of bytes used to store the static chain register on the
@@ -20701,11 +20700,13 @@ arm_expand_prologue (void)
 	     whilst the frame is being created.  We try the following
 	     places in order:
 
-	       1. The last argument register r3.
-	       2. A slot on the stack above the frame.  (This only
-	          works if the function is not a varargs function).
+	       1. The last argument register r3 if it is available.
+	       2. A slot on the stack above the frame if there are no
+		  arguments to push onto the stack.
 	       3. Register r3 again, after pushing the argument registers
-	          onto the stack.
+	          onto the stack, if this is a varargs function.
+	       4. The last slot on the stack created for the arguments to
+		  push, if this isn't a varargs function.
 
 	     Note - we only need to tell the dwarf2 backend about the SP
 	     adjustment in the second variant; the static chain register
@@ -20716,13 +20717,13 @@ arm_expand_prologue (void)
 	    insn = emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
 	  else if (args_to_push == 0)
 	    {
-	      rtx dwarf;
+	      rtx addr, dwarf;
 
 	      gcc_assert(arm_compute_static_chain_stack_bytes() == 4);
 	      saved_regs += 4;
 
-	      insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
-	      insn = emit_set_insn (gen_frame_mem (SImode, insn), ip_rtx);
+	      addr = gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx);
+	      insn = emit_set_insn (gen_frame_mem (SImode, addr), ip_rtx);
 	      fp_offset = 4;
 
 	      /* Just tell the dwarf backend that we adjusted SP.  */
@@ -20736,21 +20737,38 @@ arm_expand_prologue (void)
 	    {
 	      /* Store the args on the stack.  */
 	      if (cfun->machine->uses_anonymous_args)
-		insn = emit_multi_reg_push
-		  ((0xf0 >> (args_to_push / 4)) & 0xf);
+		{
+		  insn
+		    = emit_multi_reg_push ((0xf0 >> (args_to_push / 4)) & 0xf);
+		  emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
+		  saved_pretend_args = 1;
+		}
 	      else
-		insn = emit_insn
-		  (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
-			       GEN_INT (- args_to_push)));
+		{
+		  rtx addr, dwarf;
 
-	      RTX_FRAME_RELATED_P (insn) = 1;
+		  if (args_to_push == 4)
+		    addr = gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx);
+		  else
+		    addr
+		      = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx,
+					    plus_constant (Pmode,
+							   stack_pointer_rtx,
+							   -args_to_push));
+
+		  insn = emit_set_insn (gen_frame_mem (SImode, addr), ip_rtx);
+
+		  /* Just tell the dwarf backend that we adjusted SP.  */
+		  dwarf
+		    = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+				   plus_constant (Pmode, stack_pointer_rtx,
+						  -args_to_push));
+		  add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
+		}
 
-	      saved_pretend_args = 1;
+	      RTX_FRAME_RELATED_P (insn) = 1;
 	      fp_offset = args_to_push;
 	      args_to_push = 0;
-
-	      /* Now reuse r3 to preserve IP.  */
-	      emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
 	    }
 	}
 
@@ -20856,7 +20874,7 @@ arm_expand_prologue (void)
 	      /* Recover the static chain register.  */
 	      if (!arm_r3_live_at_start_p () || saved_pretend_args)
 		insn = gen_rtx_REG (SImode, 3);
-	      else /* if (crtl->args.pretend_args_size == 0) */
+	      else
 		{
 		  insn = plus_constant (Pmode, hard_frame_pointer_rtx, 4);
 		  insn = gen_frame_mem (SImode, insn);