This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
RE: [Patch, i386] PR 59422 - Support more targets for function multi versioning
- From: "Gopalasubramanian, Ganesh" <Ganesh dot Gopalasubramanian at amd dot com>
- To: Allan Sandfeld Jensen <carewolf at gmail dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Uros Bizjak <ubizjak at gmail dot com>
- Date: Mon, 16 Dec 2013 09:59:14 +0000
- Subject: RE: [Patch, i386] PR 59422 - Support more targets for function multi versioning
- Authentication-results: sourceware.org; auth=none
- References: <201312151954 dot 38590 dot linux at carewolf dot com>
> Btw, I couldn't find anything that corresponds to gcc's btver2 arch. Is that an old term for what has become the Jaguar architecture?
Yes, "btver2" = "jaguar". We have the name as per its family name (i.e, bobcat family) in GCC.
Similarly we have the names "bdver2" = "piledriver", "bdver3" = "steamroller" as per their family (bulldozer) name.
Regards
Ganesh
-----Original Message-----
From: Allan Sandfeld Jensen [mailto:carewolf@gmail.com]
Sent: Monday, December 16, 2013 12:25 AM
To: Uros Bizjak
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Patch, i386] PR 59422 - Support more targets for function multi versioning
Hi again
On Wednesday 11 December 2013, Uros Bizjak wrote:
> Hello!
>
> > PR gcc/59422
> >
> > This patch extends the supported targets for function multi versiong
> > to also include Haswell, Silvermont, and the most recent AMD models.
> > It also prioritizes AVX2 versions over AMD specific pre-AVX2 versions.
>
> Please add a ChangeLog entry and attach the complete patch. Please
> also state how you tested the patch, as outlined in the instructions
> [1].
>
> [1] http://gcc.gnu.org/contribute.html
>
Updated patch for better CPU model detection and added ChangeLog.
The patch has been tested with the attached test.cpp. Verified that it doesn't build before the patch, and that it builds after, and verified it selects correct versions at runtime based on either CPU model or supported ISA (tested on 3 machines: SandyBridge, IvyBridge and Phenom II).
Btw, I couldn't find anything that corresponds to gcc's btver2 arch. Is that an old term for what has become the Jaguar architecture?
`Allan