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Re: [PATCH] Add -mtune=ia support
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>, Gerald Pfeifer <gerald at pfeifer dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 5 Dec 2013 12:53:22 -0800
- Subject: Re: [PATCH] Add -mtune=ia support
- Authentication-results: sourceware.org; auth=none
- References: <20131205182254 dot GA17941 at intel dot com> <CAFULd4bVZVjyQ6e0XwVgqGZtTy8sW50Q+AoHURo5Dd3m-P8oWA at mail dot gmail dot com>
On Thu, Dec 5, 2013 at 12:38 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Thu, Dec 5, 2013 at 7:22 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>
>> We'd like to add a new -mtune=ia option for x86 to optimize for both
>> Haswell and Silvermont. Currently, -mtune=ia is aliased to -mtune=slm.
>> We will improve it further for Haswell and Silvermont. Later, we will
>> update it to future Intel processors. OK for trunk?
>>
>> 2013-12-05 H.J. Lu <hongjiu.lu@intel.com>
>>
>> * config.gcc: Support --with-cpu=ia.
>>
>> * config/i386/i386.c (cpu_names): Add "ia".
>> (processor_alias_table): Likewise.
>> (ix86_option_override_internal): Disallow -march=ia.
>> * config/i386/i386.h (target_cpu_default): Add
>> TARGET_CPU_DEFAULT_ia.
>>
>> * doc/invoke.texi: Document -mtune=ia.
>
> OK for mainline.
I checked it in.
>
> This option should also be mentioned in gcc-4.9 changes.html.
>
Here is a patch for gcc-4.9/changes.html. OK to install?
Thanks.
--
H.J.
--
Index: gcc-4.9/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.9/changes.html,v
retrieving revision 1.45
diff -u -p -r1.45 changes.html
--- gcc-4.9/changes.html 5 Dec 2013 16:07:28 -0000 1.45
+++ gcc-4.9/changes.html 5 Dec 2013 20:52:13 -0000
@@ -399,6 +399,10 @@ auto incr = [](auto x) { return x++; };
Intel Pentium-M, and Pentium4 based CPUs is no longer
considered important
for generic.
</li>
+ <li><code>-mtune=ia</code> can now be used to generate code running
+ well on the most current Intel processors, which are Haswell
+ and Silvermont for GCC 4.9.
+ </li>
<li>Better inlining of <code>memcpy</code> and <code>memset</code>
that is aware of value ranges and produces shorter alignment prologues.
</li>