RE: Fix scheduler ix86_issue_rate and ix86_adjust_cost for modern x86 chips

["Gopalasubramanian, Ganesh" <Ganesh dot Gopalasubramanian at amd dot com>]

Attached is the patch which does the following scheduler related changes.
* re-models bdver3 decoder.
* It enables lookahead with value 8 for all BD architectures. The patch doesn't consider if reloading is completed or not (an area that needs to be worked on).
* The issue rate for BD architectures are set to 4.

I see the following performance improvements on bdver3 machine.
* GemsFDTD improves by 6-7% with lookahead value changed to 8.
* Hmmer improves by 9% when issue rate when set to 4 .

I have considered the following hardware details for the model.
* There are four decoders inside a hardware decoder block.
* These four independent decoders can execute in parallel.  (They can take 8B from four different instructions and decode).
* These four decoders are pipelined 4 cycles deep and are non-stalling.
* Each decoder takes 8B of instruction data every cycle and tries decoding it. 
* Issue rate is 4.

Is it OK for upstream?

Changelog
========
2013-10-24  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	* config/i386/bdver3.md : Added two additional decoder units 
	to support issue rate of 4 and remodeled vector unit.

	* config/i386/i386.c (ix86_issue_rate): Issue rate for BD
	architectures is set to 4.

	* config/i386/i386.c (ia32_multipass_dfa_lookahead): DFA
	lookahead is set to 8 for BD architectures.

Regards
Ganesh

Attachment: bdver3_issue_rate_lookahead.patch
Description: bdver3_issue_rate_lookahead.patch