This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH i386 2/8] [AVX512] Add mask registers.


Hello Richard,
Thanks for inputs.
On 09 Sep 10:39, Richard Henderson wrote:

> gen_andhi_1 is not used, nor is it likely to be in the future, therefore this
> should still have "*".
We're using it in patch 6/8 when introducing plugins:

+  { OPTION_MASK_ISA_AVX512F, CODE_FOR_andhi_1, "__builtin_ia32_kandhi", IX86_BUILTIN_KAND16, UNKNOWN, (int) HI_FTYPE_HI_HI },

And covered by tests in patch 8/8:

new file mode 100644
index 0000000..3d777c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kandnw-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "kandnw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kandn (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}

> 
> > +(define_insn "<code>hi_1"
> > +  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!Yk")
> > +	(any_or:HI
> > +	 (match_operand:HI 1 "nonimmediate_operand" "%0,0,Yk")
> > +	 (match_operand:HI 2 "general_operand" "<g>,r<i>,Yk")))
> > +   (clobber (reg:CC FLAGS_REG))]
> 
> Likewise.
Same as above.

Do you still think we need "*"?

--
Thanks, K


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]