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RE: [PATCH,i386] FSGSBASE for AMD bdver3
- From: "Gopalasubramanian, Ganesh" <Ganesh dot Gopalasubramanian at amd dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 14 May 2013 07:26:36 +0000
- Subject: RE: [PATCH,i386] FSGSBASE for AMD bdver3
- References: <EB4625145972F94C9680D8CADD651615446D0033 at sausexdag06 dot amd dot com> <CAFULd4at9T+1Gs4DfW3C-RxuWHvEF_Ve_qKJEvEWY1aZzwpBeg at mail dot gmail dot com>
Thanks Uros!
I think you mean the amdfam10 ISA mismatch between march=native and march=amdfam10.
The below patch fills the gap.
"make -k check" passes.
Regards
Ganesh
2013-05-07 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
* config/i386/i386.c (processor_alias_table): Mismatch in ISAs
Between march=native and march=amdfam10 is fixed.
--- ./wkcpy/gcc-4.9.0/gcc/config/i386/i386.c 2013-02-21 16:27:10.000000000 +0530
+++ ./source/gcc-4.9.0/gcc/config/i386/i386.c 2013-10-21 22:20:28.000000000 +0530
@@ -2964,7 +2964,8 @@
| PTA_SSE2 | PTA_NO_SAHF},
{"amdfam10", PROCESSOR_AMDFAM10, CPU_AMDFAM10,
PTA_64BIT | PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE
- | PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM},
+ | PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM
+ | PTA_FXSR | PTA_PRFCHW},
{"barcelona", PROCESSOR_AMDFAM10, CPU_AMDFAM10,
PTA_64BIT | PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE
| PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM},
-----Original Message-----
From: Uros Bizjak [mailto:ubizjak@gmail.com]
Sent: Monday, May 13, 2013 5:50 PM
To: Gopalasubramanian, Ganesh
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH,i386] FSGSBASE for AMD bdver3
On Mon, May 13, 2013 at 1:54 PM, Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com> wrote:
> The patch enables FSGSBASE instruction generation for AMD bdver3 architectures.
>
> "make -k check" passes.
>
> Is it OK for upstream?
OK. Please also check for missing PTA_PRFCHW and PTA_FXSR for AMD processors in processor_alias_table.
Thanks,
Uros.