[PATCH, rs6000] PR target/57150, do not use VSX instructions for long double caller saves

[Michael Meissner <meissner at linux dot vnet dot ibm dot com>]

In debugging the glibc function __ieee754_scalbl when compiling for a power7
target, we discovered that the compiler was using VSX load and store
instructions to save long double types that are passed in floating point
registes.  However, since long double types are passed as two scalar floating
point values, it wastes space, and takes extra setup to use the VSX
instructions.  This patch only uses scalar load/store instructions to save long
double and __Decimal128, which has the same problem.

I have bootstraped the compiler and found no regressions in the code.  Is this
patch acceptable to check into the trunk, and gcc 4.8/4.7 branches?

[gcc]
2013-05-03  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/57150
	* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode
	to save TFmode registers and DImode to save TImode registers for
	caller save operations.
	(HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to
	mark being partially clobbered since they only use the first
	double word.

	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode
	and TDmode only use the upper 64-bits of each VSX register.

[gcc/testsuite]
2013-05-03  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/57150
	* gcc.target/powerpc/pr57150.c: New file.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

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