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[PATCH][ARM] use vsel instruction for floating point conditional moves in ARMv8


Hi all,
This patch uses the new ARMv8 AArch32 vsel instruction to implement
conditional moves of floating point numbers.
For example, an instruction of the form:
	vsel<cond>.f32  s0, s1, s2
means
	s0 := cond ? s1 : s2

This can be useful, among other places, in Thumb2 because it doesn't require
an enclosing IT block.
A small catch: The condition code used in vsel can only be one of {GE, GT,
EQ, VS}. If we want to use their negations {LT, LE, NE, VC} we just flip the
source operands.
A new predicate is introduced that checks that the comparison yields an ARM
condition code in the set {GE, GT, EQ, VS, LT, LE, NE, VC}.

New compilation tests are added. They pass on a model and no new regressions
on arm-none-eabi with qemu.

Ok for trunk?

Thanks,
Kyrill

gcc/ChangeLog

2013-01-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm.md (f_sels, f_seld): New types.
	(*cmov<mode>): New pattern.
	* config/arm/predicates.md (arm_vsel_comparison_operator): New
predicate.	


gcc/testsuite/ChangeLog

2013-01-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gcc.target/arm/vseleqdf.c: New test.
	* gcc.target/arm/vseleqsf.c: Likewise.
	* gcc.target/arm/vselgedf.c: Likewise.
	* gcc.target/arm/vselgesf.c: Likewise.
	* gcc.target/arm/vselgtdf.c: Likewise.
	* gcc.target/arm/vselgtsf.c: Likewise.
	* gcc.target/arm/vselledf.c: Likewise.
	* gcc.target/arm/vsellesf.c: Likewise.
	* gcc.target/arm/vselltdf.c: Likewise.
	* gcc.target/arm/vselltsf.c: Likewise.
	* gcc.target/arm/vselnedf.c: Likewise.
	* gcc.target/arm/vselnesf.c: Likewise.
	* gcc.target/arm/vselvcdf.c: Likewise.
	* gcc.target/arm/vselvcsf.c: Likewise.
	* gcc.target/arm/vselvsdf.c: Likewise.
	* gcc.target/arm/vselvssf.c: Likewise.

Attachment: vsel_full.txt
Description: Text document


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