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Re: [PATCH v4] Add support for sparc fused compare-and-branch.
- From: Eric Botcazou <ebotcazou at adacore dot com>
- To: David Miller <davem at davemloft dot net>
- Cc: gcc-patches at gcc dot gnu dot org, ro at cebitec dot uni-bielefeld dot de
- Date: Thu, 15 Nov 2012 09:16:26 +0100
- Subject: Re: [PATCH v4] Add support for sparc fused compare-and-branch.
- References: <20121115.003721.73594904830301977.davem@davemloft.net>
> The bootstrap comparison failure no longer happens, and this is fully
> regstrapped on sparc-linux-gnu w/--with-cpu=niagara4, and I also did a
> quick bootstrap check using --with-cpu=niagara3.
>
> Eric, any objections to committing this?
Only a minor one:
> @@ -1088,7 +1093,12 @@ sparc_option_override (void)
> if (TARGET_VIS3)
> target_flags |= MASK_VIS2 | MASK_VIS;
>
> - /* Don't allow -mvis, -mvis2, -mvis3, or -mfmaf if FPU is disabled. */
> + /* -mcbcond implies -mvis3, -mvis2 and -mvis */
> + if (TARGET_CBCOND)
> + target_flags |= MASK_VIS3 | MASK_VIS2 | MASK_VIS;
We agreed to drop this part and consequently...
> +@item -mcbcond
> +@itemx -mno-cbcond
> +@opindex mcbcond
> +@opindex mno-cbcond
> +With @option{-mcbcond}, GCC generates code that takes advantage of
> +compare-and-branch instructions, as defined in the Sparc Architecture 2011.
> +The default is @option{-mcbcond} when targeting a cpu that supports such
> +instructions, such as niagara-4 and later. Setting @option{-mcbcond} also
> +sets @option{-mvis3}, @option{-mvis2}, and @option{-mvis}.
... the last sentence as well.
Thanks for persevering in getting this through despite all the roadblocks. ;-)
--
Eric Botcazou