This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: PATCH: Handle ZERO_EXTEND offsettable address
On Sun, Nov 11, 2012 at 1:55 PM, Eric Botcazou <ebotcazou@adacore.com> wrote:
>> It fixes the problem. Can you check it in?
>
> Done.
>
> --
> Eric Botcazou
Now middle-end is fixed. I checked in this patch to remove "!" from riF->o
alternative. No regressions on Linux/x32.
Thanks.
--
H.J.
---
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 568b209..6c2d6ce 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/i386.md (*movti_internal_rex64): Remove "!" from
+ riF->o alternative.
+
2012-11-11 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sparc.h (AS_NIAGARA3_FLAG): Tweak.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2598a1f..243ab4e 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1874,7 +1874,7 @@
(const_string "OI")))])
(define_insn "*movti_internal_rex64"
- [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,!o ,x,x ,m")
+ [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,x,x ,m")
(match_operand:TI 1 "general_operand" "riFo,riF,C,xm,x"))]
"TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
{