Index: gcc/config/arm/arm-tables.opt =================================================================== --- gcc/config/arm/arm-tables.opt (revision 192556) +++ gcc/config/arm/arm-tables.opt (working copy) @@ -347,11 +347,14 @@ Enum(arm_arch) String(armv7e-m) Value(22) EnumValue -Enum(arm_arch) String(iwmmxt) Value(23) +Enum(arm_arch) String(armv8-a) Value(23) EnumValue -Enum(arm_arch) String(iwmmxt2) Value(24) +Enum(arm_arch) String(iwmmxt) Value(24) +EnumValue +Enum(arm_arch) String(iwmmxt2) Value(25) + Enum Name(arm_fpu) Type(int) Known ARM FPUs (for use with the -mfpu= option): @@ -396,5 +399,14 @@ Enum(arm_fpu) String(neon-vfpv4) Value(12) EnumValue -Enum(arm_fpu) String(vfp3) Value(13) +Enum(arm_fpu) String(fp-armv8) Value(13) +EnumValue +Enum(arm_fpu) String(neon-fp-armv8) Value(14) + +EnumValue +Enum(arm_fpu) String(crypto-neon-fp-armv8) Value(15) + +EnumValue +Enum(arm_fpu) String(vfp3) Value(16) + Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 192556) +++ gcc/config/arm/arm.c (working copy) @@ -686,6 +686,7 @@ architecture. */ #define FL_ARCH7 (1 << 22) /* Architecture 7. */ #define FL_ARM_DIV (1 << 23) /* Hardware divide (ARM mode). */ +#define FL_ARCH8 (1 << 24) /* Architecture 8. */ #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */ #define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */ @@ -716,6 +717,8 @@ #define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_THUMB_DIV) #define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_THUMB_DIV) #define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM) +#define FL_FOR_ARCH8A (FL_FOR_ARCH7 | FL_ARCH6K | FL_ARCH8 | FL_THUMB_DIV \ + | FL_ARM_DIV | FL_NOTM) /* The bits in this mask specify which instructions we are allowed to generate. */ @@ -765,6 +768,9 @@ /* Nonzero if instructions present in ARMv7E-M can be used. */ int arm_arch7em = 0; +/* Nonzero if instructions present in ARMv8 can be used. */ +int arm_arch8 = 0; + /* Nonzero if this chip can benefit from load scheduling. */ int arm_ld_sched = 0; @@ -1059,8 +1065,8 @@ static const struct arm_fpu_desc all_fpus[] = { -#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16) \ - { NAME, MODEL, REV, VFP_REGS, NEON, FP16 }, +#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) \ + { NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO }, #include "arm-fpus.def" #undef ARM_FPU }; @@ -1743,6 +1749,7 @@ arm_arch6m = arm_arch6 && !arm_arch_notm; arm_arch7 = (insn_flags & FL_ARCH7) != 0; arm_arch7em = (insn_flags & FL_ARCH7EM) != 0; + arm_arch8 = (insn_flags & FL_ARCH8) != 0; arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0; arm_arch_xscale = (insn_flags & FL_XSCALE) != 0; @@ -1959,6 +1966,7 @@ /* Enable -munaligned-access by default for - all ARMv6 architecture-based processors - ARMv7-A, ARMv7-R, and ARMv7-M architecture-based processors. + - ARMv8 architecture-base processors. Disable -munaligned-access by default for - all pre-ARMv6 architecture-based processors Index: gcc/config/arm/arm.h =================================================================== --- gcc/config/arm/arm.h (revision 192556) +++ gcc/config/arm/arm.h (working copy) @@ -296,6 +296,9 @@ /* FPU supports fused-multiply-add operations. */ #define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4) +/* FPU supports Crypto extensions. */ +#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto) + /* FPU supports Neon instructions. The setting of this macro gets revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT and TARGET_HARD_FLOAT to ensure that NEON instructions are @@ -400,6 +403,7 @@ enum vfp_reg_type regs; int neon; int fp16; + int crypto; } *arm_fpu_desc; /* Which floating point hardware to schedule for. */ @@ -443,7 +447,8 @@ BASE_ARCH_7A = 7, BASE_ARCH_7R = 7, BASE_ARCH_7M = 7, - BASE_ARCH_7EM = 7 + BASE_ARCH_7EM = 7, + BASE_ARCH_8A = 8 }; /* The major revision number of the ARM Architecture implemented by the target. */ @@ -482,6 +487,9 @@ /* Nonzero if instructions present in ARMv7E-M can be used. */ extern int arm_arch7em; +/* Nonzero if this chip supports the ARM Architecture 8 extensions. */ +extern int arm_arch8; + /* Nonzero if this chip can benefit from load scheduling. */ extern int arm_ld_sched; Index: gcc/config/arm/arm-arches.def =================================================================== --- gcc/config/arm/arm-arches.def (revision 192556) +++ gcc/config/arm/arm-arches.def (working copy) @@ -55,5 +55,6 @@ ARM_ARCH("armv7-r", cortexr4, 7R, FL_CO_PROC | FL_FOR_ARCH7R) ARM_ARCH("armv7-m", cortexm3, 7M, FL_CO_PROC | FL_FOR_ARCH7M) ARM_ARCH("armv7e-m", cortexm4, 7EM, FL_CO_PROC | FL_FOR_ARCH7EM) +ARM_ARCH("armv8-a", cortexa15, 8A, FL_CO_PROC | FL_FOR_ARCH8A) ARM_ARCH("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT) ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2) Index: gcc/config/arm/arm-fpus.def =================================================================== --- gcc/config/arm/arm-fpus.def (revision 192556) +++ gcc/config/arm/arm-fpus.def (working copy) @@ -21,24 +21,28 @@ /* Before using #include to read this file, define a macro: - ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16) + ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) The arguments are the fields of struct arm_fpu_desc. genopt.sh assumes no whitespace up to the first "," in each entry. */ -ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false) -ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false) -ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true) -ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false) -ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true) -ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false) -ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true) -ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false) -ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true) -ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true) -ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true) -ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true) -ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true) +ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false, false) +ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false) +ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true, false) +ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false, false) +ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true, false) +ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false, false) +ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true, false) +ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false, false) +ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false) +ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false) +ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false) +ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false) +ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false) +ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false) +ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false) +ARM_FPU("crypto-neon-fp-armv8", + ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, true) /* Compatibility aliases. */ -ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false) +ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false) Index: gcc/config/arm/bpabi.h =================================================================== --- gcc/config/arm/bpabi.h (revision 192556) +++ gcc/config/arm/bpabi.h (working copy) @@ -64,6 +64,7 @@ |march=armv7-m|mcpu=cortex-m3 \ |march=armv7e-m|mcpu=cortex-m4 \ |march=armv6-m|mcpu=cortex-m0 \ + |march=armv8-a \ :%{!r:--be8}}}" #else #define BE8_LINK_SPEC \ @@ -74,6 +75,7 @@ |march=armv7-m|mcpu=cortex-m3 \ |march=armv7e-m|mcpu=cortex-m4 \ |march=armv6-m|mcpu=cortex-m0 \ + |march=armv8-a \ :%{!r:--be8}}}" #endif Index: gcc/testsuite/gcc.target/arm/ftest-support-thumb.h =================================================================== --- gcc/testsuite/gcc.target/arm/ftest-support-thumb.h (revision 192556) +++ gcc/testsuite/gcc.target/arm/ftest-support-thumb.h (working copy) @@ -26,4 +26,5 @@ {7, 1, 2, 'A', 1, 15, 1, 1, 1, 1, 1}, /* ARCH_V7A. */ {7, 1, 2, 'R', 1, 15, 1, 1, 1, 1, 1}, /* ARCH_V7R. */ {7, 0, 2, 'M', 1, 7, 1, 0, 0, 1, 1}, /* ARCH_V7M. */ - {7, 0, 2, 'M', 1, 7, 1, 1, 1, 1, 1}}; /* ARCH_V7EM. */ + {7, 0, 2, 'M', 1, 7, 1, 1, 1, 1, 1}, /* ARCH_V7EM. */ + {8, 1, 2, 'A', 1, 15, 1, 1, 1, 1, 1}}; /* ARCH_V8A. */ Index: gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c =================================================================== --- gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c (revision 0) +++ gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c (revision 0) @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_nothumb } */ +/* { dg-require-effective-target arm_arch_v8a_multilib } */ +/* { dg-options "-marm" } */ +/* { dg-add-options arm_arch_v8a } */ + +#include "ftest-support-arm.h" + +int +main (void) +{ + return ftest (ARCH_V8A); +} + Index: gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c =================================================================== --- gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c (revision 0) +++ gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c (revision 0) @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_eabi } */ +/* { dg-require-effective-target arm_arch_v8a_multilib } */ +/* { dg-options "-mthumb" } */ +/* { dg-add-options arm_arch_v8a } */ + +#include "ftest-support-thumb.h" + +int +main (void) +{ + return ftest (ARCH_V8A); +} + Index: gcc/testsuite/gcc.target/arm/ftest-support.h =================================================================== --- gcc/testsuite/gcc.target/arm/ftest-support.h (revision 192556) +++ gcc/testsuite/gcc.target/arm/ftest-support.h (working copy) @@ -22,6 +22,7 @@ ARCH_V7R, ARCH_V7M, ARCH_V7EM, + ARCH_V8A, ARCH_COUNT }; Index: gcc/testsuite/gcc.target/arm/ftest-support-arm.h =================================================================== --- gcc/testsuite/gcc.target/arm/ftest-support-arm.h (revision 192556) +++ gcc/testsuite/gcc.target/arm/ftest-support-arm.h (working copy) @@ -26,4 +26,5 @@ {7, 1, 2, 'A', 1, 15, 1, 1, 1, 1, 1}, /* ARCH_V7A. */ {7, 1, 2, 'R', 1, 15, 1, 1, 1, 1, 1}, /* ARCH_V7R. */ {7, 0, 2, 'M', 1, 7, 1, 0, 0, 1, 1}, /* ARCH_V7M. */ - {7, 0, 2, 'M', 1, 7, 1, 1, 0, 1, 1}}; /* ARCH_V7EM. */ + {7, 0, 2, 'M', 1, 7, 1, 1, 0, 1, 1}, /* ARCH_V7EM. */ + {8, 1, 2, 'A', 1, 15, 1, 1, 1, 1, 1}}; /* ARCH_V8A. */ Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp (revision 192556) +++ gcc/testsuite/lib/target-supports.exp (working copy) @@ -2246,7 +2246,8 @@ v7a "-march=armv7-a" __ARM_ARCH_7A__ v7r "-march=armv7-r" __ARM_ARCH_7R__ v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ - v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ } { + v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ + v8a "-march=armv8-a" __ARM_ARCH_8A__ } { eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] { proc check_effective_target_arm_arch_FUNC_ok { } { if { [ string match "*-marm*" "FLAG" ] && Index: gcc/testsuite/ChangeLog =================================================================== --- gcc/testsuite/ChangeLog (revision 192556) +++ gcc/testsuite/ChangeLog (working copy) @@ -1,3 +1,14 @@ +2012-10-17 Matthew Gretton-Dann + + * gcc.target/arm/ftest-armv8a-arm.c: New testcase. + * gcc.target/arm/ftest-armv8a-thumb.c: Likewise. + * gcc.target/arm/ftest-support-arm.h (feature_matrix): Add + ARMv8-A row. + * gcc.target/arm/ftest-support-thumb.h (feature_matrix): + Likewise. + * gcc.target/arm/ftest-support.h (architecture): Add ARMv8-A. + * lib/target-supports.exp: Add ARMv8-A architecture expectation. + 2012-10-16 Jan Hubicka * gcc.target/i386/l_fma_float_?.c: Update.