This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [RFC PATCH] Add support for sparc compare-and-branch.


From: Eric Botcazou <ebotcazou@adacore.com>
Date: Sat, 13 Oct 2012 15:47:11 +0200

>> The trouble area, and where I need help from either Rainer or Eric,
>> is the Solaris2 bits.
>> 
>> I think we need to move the Solaris assembler stuff over to a model
>> where it passes:
>> 
>> 	-m{32,64} -xarch=sparcFOO
>> 
>> instead of using the v8plusX stuff to indicate 32bit.  And that's
>> the direction I tried to move in here.
> 
> The only versions of the Solaris assembler I have access to only support 
> v8plusX according to the man page.  Has that changed recently?

For the older stuff I mean doing something like "-m32 -xarch=v9X"

> 
>> 	* config/sparc/sparc.opt (mvis4): New option.
>> 	* config/sparc/sparc-c.c (sparc_target_macros): When TARGET_VIS4,
>> 	define __VIS__ to 0x400.
> 
> What's the relationship between VIS4 and SPARC-T4 exactly?  The above manual 
> only speaks of VIS3 as far as I can see.  And the CBcond instructions are not 
> marked as belonging to VIS (3 or 4), so using -mvis4 for them seems strange.
> Why not make them depend on -mcpu=niagara4 instead?

The current assembler in Solaris Studio (called 'fbe') calls this
stuff "sparc4" which I guess means "SPARC-T4 and later".

I'm just calling it VIS4 in GCC so that we can export intrinsics of,
for example, the cryptographic instructions at some point using the
__VIS__ version CPP tests.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]