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Re: [PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418
On Sun, Sep 2, 2012 at 1:49 PM, Steven Bosscher <stevenb.gcc@gmail.com> wrote:
>>>> Attached patch prevents compute_bb_for_insn to calculate BB for
>>>> barrier RTXes. This is in fact the same approach all other
>>>> *_bb_for_insn use.
>>
>>> What is happening for you, is that you're seeing a BARRIER between
>>> BB_HEAD(bb) and BB_END(bb), which is not possible. The barrier is
>>> mis-placed.
>>
>> Please see how the dump looks:
>>
>> (insn 12 11 28 3 (set (reg:SI 1 dx [63])
>> (const_int 2 [0x2])) pr54455.c:5 65 {*movsi_internal}
>> (nil))
>> (note 28 12 29 3 NOTE_INSN_EPILOGUE_BEG)
>> (insn/f 29 28 30 3 (set (reg/f:DI 6 bp)
>> (mem:DI (post_inc:DI (reg/f:DI 7 sp)) [0 S8 A8])) pr54455.c:13 -1
>> (expr_list:REG_CFA_DEF_CFA (plus:DI (reg/f:DI 7 sp)
>> (const_int 8 [0x8]))
>> (nil)))
>> (jump_insn 30 29 31 3 (simple_return) pr54455.c:13 -1
>> (nil)
>> -> simple_return)
>> (barrier 31 30 15)
>> (note 15 31 21 ("lab") NOTE_INSN_DELETED_LABEL 3)
>> (note 21 15 24 NOTE_INSN_DELETED)
>> (note 24 21 0 NOTE_INSN_DELETED)
>>
>> Please note that we have a bunch of notes at the end, and barrier
>> above them. There are no active insns between barrer and BB_END. Where
>> should this RTX go?
>
> It doesn't have to be the barrier that has to move. It could also be
> that the barrier is inserted in the right place but BB_END wasn't
> updated to point to the jump insn.
It looks that NOTE_INSN_DELETED_LABEL interferes with barrier.
Uros.
- References:
- [PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418
- Re: [PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418
- Re: [PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418
- Re: [PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418