[SH] PR 51244 - Use more zero displacement branches

[Oleg Endo <oleg dot endo at t-online dot de>]

Hello,

This adds two new patterns to undo an optimization that is done by ifcvt
and is not beneficial if zero displacement branches are available on SH.
Tested on rev 190459 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"

and no new failures.
OK?

Cheers,
Oleg

ChangeLog:

	PR target/51244
	* config/sh/sh.md (*cset_zero): New insns.

testsuite/ChangeLog:

	PR target/51244
	* gcc.target/sh/pr51244-11.c: New.

Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md	(revision 190459)
+++ gcc/config/sh/sh.md	(working copy)
@@ -10409,6 +10409,41 @@
   operands[0] = gen_reg_rtx (SImode);
 })
 
+;; The *cset_zero patterns convert optimizations such as
+;;	"if (test) x = 0;" to "x &= -(test == 0);"
+;; back to conditional branch sequences if zero-displacement branches
+;; are enabled.
+;; FIXME: These patterns can be removed when conditional execution patterns
+;; are implemented, since ifcvt will not perform these optimizations if
+;; conditional execution is supported.
+(define_insn "*cset_zero"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+	(and:SI (plus:SI (match_operand:SI 1 "t_reg_operand")
+			 (const_int -1))
+		(match_operand:SI 2 "arith_reg_operand" "0")))]
+  "TARGET_SH1 && TARGET_ZDCBRANCH"
+{
+  return       "bf	0f"	"\n"
+	 "	mov	#0,%0"	"\n"
+	 "0:";
+}
+  [(set_attr "type" "arith") ;; poor approximation
+   (set_attr "length" "4")])
+
+(define_insn "*cset_zero"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+	(if_then_else:SI (match_operand:SI 1 "t_reg_operand")
+			 (match_operand:SI 2 "arith_reg_operand" "0")
+			 (const_int 0)))]
+  "TARGET_SH1 && TARGET_ZDCBRANCH"
+{
+  return       "bt	0f"	"\n"
+	 "	mov	#0,%0"	"\n"
+	 "0:";
+}
+  [(set_attr "type" "arith") ;; poor approximation
+   (set_attr "length" "4")])
+
 (define_expand "cstoresf4"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(match_operator:SI 1 "sh_float_comparison_operator"
Index: gcc/testsuite/gcc.target/sh/pr51244-11.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr51244-11.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr51244-11.c	(revision 0)
@@ -0,0 +1,24 @@
+/* Check that zero-displacement branches are used instead of branch-free
+   execution patterns.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -mzdcbranch" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-not "subc|and" } } */
+
+int*
+test_00 (int* s)
+{
+  if (s[0] == 0)
+    if (!s[3])
+      s = 0;
+  return s;
+}
+
+int*
+test_01 (int* s)
+{
+  if (s[0] == 0)
+    if (s[3])
+      s = 0;
+  return s;
+}