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Re: [PATCH, MIPS] DSP ALU scheduling
Sandra Loosemore <sandra@codesourcery.com> writes:
> @@ -569,7 +569,7 @@
> UNSPEC_DPAU_H_QBL))]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpau.h.qbl\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> (define_insn "mips_dpau_h_qbr"
> @@ -580,7 +580,7 @@
> UNSPEC_DPAU_H_QBR))]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpau.h.qbr\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> ;; DPSU*
> @@ -592,7 +592,7 @@
> UNSPEC_DPSU_H_QBL))]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpsu.h.qbl\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> (define_insn "mips_dpsu_h_qbr"
> @@ -603,7 +603,7 @@
> UNSPEC_DPSU_H_QBR))]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpsu.h.qbr\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> ;; DPAQ*
> @@ -619,7 +619,7 @@
> UNSPEC_DPAQ_S_W_PH))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpaq_s.w.ph\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> ;; DPSQ*
> @@ -635,7 +635,7 @@
> UNSPEC_DPSQ_S_W_PH))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpsq_s.w.ph\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> ;; MULSAQ*
> @@ -651,7 +651,7 @@
> UNSPEC_MULSAQ_S_W_PH))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "mulsaq_s.w.ph\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> ;; DPAQ*
> @@ -667,7 +667,7 @@
> UNSPEC_DPAQ_SA_L_W))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpaq_sa.l.w\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmacsat")
> (set_attr "mode" "SI")])
>
> ;; DPSQ*
> @@ -683,7 +683,7 @@
> UNSPEC_DPSQ_SA_L_W))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "dpsq_sa.l.w\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmacsat")
> (set_attr "mode" "SI")])
>
> ;; MAQ*
> @@ -699,7 +699,7 @@
> UNSPEC_MAQ_S_W_PHL))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "maq_s.w.phl\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> (define_insn "mips_maq_s_w_phr"
> @@ -714,7 +714,7 @@
> UNSPEC_MAQ_S_W_PHR))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "maq_s.w.phr\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmac")
> (set_attr "mode" "SI")])
>
> ;; MAQ_SA*
> @@ -730,7 +730,7 @@
> UNSPEC_MAQ_SA_W_PHL))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "maq_sa.w.phl\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmacsat")
> (set_attr "mode" "SI")])
>
> (define_insn "mips_maq_sa_w_phr"
> @@ -745,7 +745,7 @@
> UNSPEC_MAQ_SA_W_PHR))])]
> "ISA_HAS_DSP && !TARGET_64BIT"
> "maq_sa.w.phr\t%q0,%2,%3"
> - [(set_attr "type" "imadd")
> + [(set_attr "type" "dspmacsat")
> (set_attr "mode" "SI")])
I think all these want (set_attr "accum_in" "1") too.
Richard