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Re: [PATCH 0/2] Convert s390 to atomic optabs, v2


I wrote:
> Just a quick heads-up that something still must be broken;
> I get extra test suite failures:
> 
> FAIL: gcc.dg/atomic-compare-exchange-1.c execution test
> FAIL: gcc.dg/atomic-compare-exchange-2.c execution test
> FAIL: gcc.dg/atomic-compare-exchange-3.c execution test
> WARNING: program timed out.
> FAIL: gcc.dg/atomic-op-3.c execution test
> FAIL: gcc.dg/ia64-sync-2.c execution test
> FAIL: gcc.dg/ia64-sync-3.c execution test
> FAIL: gcc.dg/sync-3.c execution test
> FAIL: gcc.dg/simulate-thread/atomic-other-int.c  -O0 -g  thread simulation test
> FAIL: gcc.dg/simulate-thread/atomic-other-int.c  -O2 -g  thread simulation test
> FAIL: gcc.dg/simulate-thread/atomic-other-int.c  -O3 -g  thread simulation test
> FAIL: gcc.dg/simulate-thread/atomic-other-short.c  -O3 -g  thread simulation test
> FAIL: libatomic.c/atomic-compare-exchange-3.c execution test
> WARNING: program timed out.
> FAIL: libatomic.c/atomic-op-3.c execution test
> FAIL: libatomic.c/generic-2.c execution test
> 
> and just about all libgomp tests and many libjava tests seem
> to hang and time out ...
> 
> I'll have a look what's going on here.

Richard Henderson wrote:
> +(define_expand "atomic_compare_and_swap<mode>"
> +  [(match_operand:SI 0 "register_operand")	;; bool success output
> +   (match_operand:DGPR 1 "register_operand")	;; oldval output
> +   (match_operand:DGPR 2 "s_operand")		;; memory
> +   (match_operand:DGPR 3 "register_operand")	;; expected intput
> +   (match_operand:DGPR 4 "register_operand")	;; newval intput
> +   (match_operand:SI 5 "const_int_operand")	;; is_weak
> +   (match_operand:SI 6 "const_int_operand")	;; success model
> +   (match_operand:SI 7 "const_int_operand")]	;; failure model
> +  ""
> +{
> +  rtx cc, cmp;
> +  emit_insn (gen_atomic_compare_and_swap<mode>_internal
> +	     (operands[1], operands[2], operands[3], operands[4]));
> +  cc = gen_rtx_REG (CCZ1mode, CC_REGNUM);
> +  cmp = gen_rtx_NE (SImode, cc, const0_rtx);
> +  emit_insn (gen_cstorecc4 (operands[0], cmp, cc, const0_rtx));

This needs to be an EQ instead of NE comparison here ...

> +  if (is_weak)
>      {
> -      cmpv = force_reg (SImode, val);
> -      store_bit_field (cmpv, GET_MODE_BITSIZE (mode), 0,
> -		       0, 0, SImode, cmp);
> +      cc = s390_emit_compare_and_swap (NE, res, ac.memsi, cmpv, newv);
> +      emit_insn (gen_cstorecc4 (btarget, cc, XEXP (cc, 0), XEXP (cc, 1)));
>      }

... and here.

This fixes the main atomic test failures I was seeing.  I've restarted
the full bootstrap / regression test now ...

Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU Toolchain for Linux on System z and Cell BE
  Ulrich.Weigand@de.ibm.com


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