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Re: [PATCH] Improve andq $0xffffffff, %reg handling (PR target/53110)


On Mon, Jul 23, 2012 at 10:17 PM, Teresa Johnson <tejohnson@google.com> wrote:
> Resending in plain text mode so it goes through.
> Teresa
>
> On Mon, Jul 23, 2012 at 12:03 PM, Teresa Johnson <tejohnson@google.com> wrote:
>> Any possibility of getting these patches (186979 and 186993), along with
>> r184891 (which added the and->zext splitter), backported to the 4_7 branch?
>> I found a performance issue where "andw $0xff, %reg" was not being converted
>> to movzbl when the source and target registers are the same, resulting in
>> LCP stalls, which is fixed by this series of patches.

These looks too risky, especially r184891. I have waited with this
patch after 4.7 branched just because of this risk factor.

BTW: This part was wrong, there is no xmm->xmm movq insn:

	(*zero_extendsidi2_rex64): Add x,x alternative.
	(*zero_extendsidi2): Ditto.

Uros.


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