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PING.
On Mon, May 28, 2012 at 10:51:27AM +0100, Matthew Gretton-Dann wrote:All,
This patch adds a variety of predefined macros to reveal the presence of various features of the ARM architecture. These are detailed in the ARM C Language Extensions specification, available here: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053-/index.html
This patch then adds compiler predefines for:
__ARM_SIZEOF_MINIMAL_ENUM which is defined as the size in bytes of the smallest enum.
__ARM_ARCH which is defined as the major revision of the ARM instruction set which the target implements.
__ARM_ARCH_ISA_THUMB which is defined as the major revision of the thumb instruction set which the target implements.
__ARM_ARCH_PROFILE which is defined on ARMv7 targets, and ARMv6-M targets to be the character value of `A', `R' or `M', as defined by the target's architecture profile.
__ARM_FEATURE_LDREX which is defined as a bit mask, composed of the widths of `ldrex' available on the target. These widths are: bit 0 - byte. bit 1 - 16-bit halfword. bit 2 - 32-bit word. bit 3 - 64-bit doubleword.
__ARM_FEATURE_CLZ which is defined for targets which support the `clz' instruction.
__ARM_FEATURE_SIMD32 which is defined when the ARMv6 integer SIMD instructions are available.
__ARM_FEATURE_QBIT which is defined when the Q-Bit is present in the APSR.
__ARM_FEATURE_SAT which is defined when the saturation instructions are available.
__ARM_FP which is defined as a bit mask composed of the widths of floating-point types with hardware support on the target. These widths are: bit 1 - 16-bit half precision. bit 2 - 32-bit single precision. bit 3 - 64-bit double precision.
__ARM_FP16_FORMAT_IEEE which is defined when the IEEE 754-2008 standard for 16-bit floating point representation is used.
__ARM_FP16_FORMAT_ALTERNATIVE which is defined when the ARM alternative standard for 16-bit floating point representation is used.
__ARM_FEATURE_FMA which is defined when the fused multiply-accumulate instructions are available for floating-point and/or Advanced SIMD values.
__ARM_NEON_FP which is defined as a bit mask composed of the widths of floating point values supported by the NEON hardware. These widths are, as with __ARM_FP: bit 1 - 16-bit half precision. bit 2 - 32-bit single precision. bit 3 - 64-bit double precision.
__ARM_WMMX which is defined where iwmmx operations are available on the target.
As these macros may expand to something other than `1', we also update cpp.texi to reflect this fact.
OK?
Thanks,
Matt
gcc/ChangeLog: 2012-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add new built-ins. (TARGET_FMA): New macro. (TARGET_ARM_QBIT, TARGET_ARM_SAT): Likewise. (TARGET_ARM_ARCH): Likewise. (TARGET_ARM_ARCH_ISA_THUMB): Likewise. (TARGET_V6M, TARGET_V7M): Likewise. (TARGET_ARM_ARCH_PROFILE): Likewise. (TARGET_ARM_FEATURE_LDREX): Likewise. (TARGET_ARM_FP, TARGET_NEON_FP): Likewise. (ARM_MIN_ENUM_SIZE): Likewise. * config/arm/arm.c (arm_file_start): Refactor appropriately. (base_architecture): New enumeration. (arm_base_arch): New global variable. (processors): Add field base_arch. (ARM_ARCH, ARM_CORE): Adjust accordingly. (arm_option_override): Add initialization of arm_base_arch. * doc/cpp.texi (system-specific predefined macros.): Change.
gcc/testsuite/ChangeLog: 2012-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> James Greenhalgh <james.greenhalgh@arm.com>
* gcc.target/arm/ftest-support-arm.h New testcase. * gcc.target/arm/ftest-support-thumb.h Likewise. * gcc.target/arm/ftest-support.h Likewise. * gcc.target/arm/ftest-armv4-arm.c: Likewise. * gcc.target/arm/ftest-armv4t-arm.c: Likewise. * gcc.target/arm/ftest-armv4t-thumb.c: Likewise. * gcc.target/arm/ftest-armv5t-arm.c Likewise. * gcc.target/arm/ftest-armv5t-thumb.c Likewise. * gcc.target/arm/ftest-armv5te-arm.c: Likewise. * gcc.target/arm/ftest-armv5te-thumb.c: Likewise. * gcc.target/arm/ftest-armv6-arm.c Likewise. * gcc.target/arm/ftest-armv6-thumb.c Likewise. * gcc.target/arm/ftest-armv6k-arm.c Likewise. * gcc.target/arm/ftest-armv6k-thumb.c Likewise. * gcc.target/arm/ftest-armv6m-thumb.c: Likewise. * gcc.target/arm/ftest-armv6t2-arm.c: Likewise. * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise. * gcc.target/arm/ftest-armv6z-arm.c: Likewise. * gcc.target/arm/ftest-armv6z-thumb.c: Likewise. * gcc.target/arm/ftest-armv7a-arm.c Likewise. * gcc.target/arm/ftest-armv7a-thumb.c Likewise. * gcc.target/arm/ftest-armv7m-thumb.c: Likewise. * gcc.target/arm/ftest-armv7em-thumb.c: Likewise. * gcc.target/arm/ftest-armv7r-arm.c Likewise. * gcc.target/arm/ftest-armv7r-thumb.c Likewise. * gcc/testsuite/lib/target-supports.exp (check_effective_target_arm_arch_FUNC): Add support for more architectures. (add_options_for_arm_arch_FUNC): Likewise. (check_effective_target_arm_arch_FUNC_multilib): New functions.
-- Matthew Gretton-Dann Principal Engineer, PD Software - Tools, ARM Ltd
Attachment:
acle-feature-macros.txt
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