Re: [PING ARM Patches] PR53447: optimizations of 64bit ALU operation with constant

[Carrot Wei <carrot at google dot com>]

Hi Michael

It seems the wiki page describes 64bit operations on NEON only. My
patches improves 64bit operations on core registers only. I touched
the neon patterns simply because those DI mode operations are enabled
separately according to the TARGET_NEON value, so in the neon patterns
I duplicated the alternatives in normal cases.

thanks
Carrot

On Wed, Jun 20, 2012 at 9:58 AM, Michael Hope <michael.hope@linaro.org> wrote:
> On 18 June 2012 22:17, Carrot Wei <carrot@google.com> wrote:
>> Hi
>>
>> Could ARM maintainers review following patches?
>>
>> http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00497.html
>> 64bit add/sub constants.
>>
>> http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01834.html
>> 64bit and with constants.
>>
>> http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01974.html
>> 64bit xor with constants.
>>
>> http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00287.html
>> 64bit ior with constants.
>
> Hi Carrot. ?Out of interest, how do these interact with the 64 bit in
> NEON patches that Andrew has been doing? ?They seem to touch many of
> the same patterns and I'm concerned that they'd cause GCC to prefer
> core registers instead of NEON, especially as the constant values you
> can use in a vmov are limited.
>
> There's a (in progress) summary of the current state for the standard
> C operators here:
> ?https://wiki.linaro.org/MichaelHope/Sandbox/64BitOperations
>
> -- Michael