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Hello! Attached patch avoids a deficiency in reload, where reload gives up on handling subregs of pseudos (please see the PR [1] for explanation by Ulrich). The patch simply avoids generating V4SF moves with V4SF subregs of V2DF values unless really necessary (i.e. moving SSE2 modes without SSE2 enabled, which shouldn't happen anyway). With patched gcc, expand pass emits (unaligned) moves in their original mode, and this mode is kept until asm is generated. The asm instruction is chosen according to the mode of insn pattern, and the mode is calculated using various influencing conditions. 2012-05-09 Uros Bizjak <ubizjak@gmail.com> PR target/44141 * config/i386/i386.c (ix86_expand_vector_move_misalign): Do not handle 128 bit vectors specially for TARGET_AVX. Emit sse2_movupd and sse_movupd RTXes for TARGET_AVX, TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL or when optimizing for size. * config/i386/sse.md (*mov<mode>_internal): Remove TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling from asm output code. Calculate "mode" attribute according to optimize_function_for_size_p and TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL flag. (*<sse>_movu<ssemodesuffix><avxsizesuffix>): Choose asm template depending on the mode of the instruction. Calculate "mode" attribute according to optimize_function_for_size_p, TARGET_SSE_TYPELESS_STORES and TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL flags. (*<sse2>_movdqu<avxsizesuffix>): Ditto. Patch was bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}. The patch also fixes the testcase from the PR. Patch will be committed to mainline SVN. [1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44141#c16 Uros.
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