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Re: [PATCH] teach emit_store_flag to use clz/ctz
- From: Paolo Bonzini <bonzini at gnu dot org>
- Cc: gcc-patches at gcc dot gnu dot org, rguenther at suse dot de, amodra at gmail dot com
- Date: Fri, 27 Apr 2012 12:20:41 +0200
- Subject: Re: [PATCH] teach emit_store_flag to use clz/ctz
- References: <1335520129-28934-1-git-send-email-bonzini@gnu.org>
> Index: config/rs6000/rs6000.md
> ===================================================================
> --- config/rs6000/rs6000.md (revisione 186859)
> +++ config/rs6000/rs6000.md (copia locale)
> @@ -2129,7 +2129,7 @@
> (define_expand "abssi2"
> [(set (match_operand:SI 0 "gpc_reg_operand" "")
> (abs:SI (match_operand:SI 1 "gpc_reg_operand" "")))]
> - ""
> + "TARGET_ISEL || TARGET_POWER"
> "
> {
> if (TARGET_ISEL)
> @@ -2137,11 +2137,6 @@
> emit_insn (gen_abssi2_isel (operands[0], operands[1]));
> DONE;
> }
> - else if (! TARGET_POWER)
> - {
> - emit_insn (gen_abssi2_nopower (operands[0], operands[1]));
> - DONE;
> - }
> }")
>
> (define_insn "*abssi2_power"
> @@ -2188,36 +2183,12 @@
> (match_dup 2)))]
> "")
>
> -(define_insn_and_split "abssi2_nopower"
> - [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
> - (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0")))
> - (clobber (match_scratch:SI 2 "=&r,&r"))]
> - "! TARGET_POWER && ! TARGET_ISEL"
> - "#"
> - "&& reload_completed"
> - [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
> - (set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
> - (set (match_dup 0) (minus:SI (match_dup 0) (match_dup 2)))]
> - "")
> -
> (define_insn "*nabs_power"
> [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
> (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r"))))]
> "TARGET_POWER"
> "nabs %0,%1")
>
> -(define_insn_and_split "*nabs_nopower"
> - [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
> - (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0"))))
> - (clobber (match_scratch:SI 2 "=&r,&r"))]
> - "! TARGET_POWER"
> - "#"
> - "&& reload_completed"
> - [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
> - (set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
> - (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 0)))]
> - "")
> -
> (define_expand "neg<mode>2"
> [(set (match_operand:SDI 0 "gpc_reg_operand" "")
> (neg:SDI (match_operand:SDI 1 "gpc_reg_operand" "")))]
> @@ -7710,40 +7681,13 @@
> (define_expand "absdi2"
> [(set (match_operand:DI 0 "gpc_reg_operand" "")
> (abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))]
> - "TARGET_POWERPC64"
> + "TARGET_POWERPC64 && TARGET_ISEL"
> "
> {
> - if (TARGET_ISEL)
> - emit_insn (gen_absdi2_isel (operands[0], operands[1]));
> - else
> - emit_insn (gen_absdi2_internal (operands[0], operands[1]));
> + emit_insn (gen_absdi2_isel (operands[0], operands[1]));
> DONE;
> }")
>
> -(define_insn_and_split "absdi2_internal"
> - [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
> - (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0")))
> - (clobber (match_scratch:DI 2 "=&r,&r"))]
> - "TARGET_POWERPC64 && !TARGET_ISEL"
> - "#"
> - "&& reload_completed"
> - [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
> - (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
> - (set (match_dup 0) (minus:DI (match_dup 0) (match_dup 2)))]
> - "")
> -
> -(define_insn_and_split "*nabsdi2"
> - [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
> - (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
> - (clobber (match_scratch:DI 2 "=&r,&r"))]
> - "TARGET_POWERPC64 && !TARGET_ISEL"
> - "#"
> - "&& reload_completed"
> - [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
> - (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
> - (set (match_dup 0) (minus:DI (match_dup 2) (match_dup 0)))]
> - "")
> -
> (define_insn "muldi3"
> [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
> (mult:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r")
> @@ -13100,13 +13044,9 @@
> operands[2], operands[3]);
> }
>
> - /* For SNE, we would prefer that the xor/abs sequence be used for integers.
> - For SEQ, likewise, except that comparisons with zero should be done
> - with an scc insns. However, due to the order that combine see the
> - resulting insns, we must, in fact, allow SEQ for integers. Fail in
> - the cases we don't want to handle or are best handled by portable
> - code. */
> - if (GET_CODE (operands[1]) == NE)
> + /* Fail in the cases we don't want to handle or are best handled by
> + portable code. */
> + if (GET_CODE (operands[1]) == NE || GET_CODE (operands[1]) == EQ)
> FAIL;
> if ((GET_CODE (operands[1]) == LT || GET_CODE (operands[1]) == LE
> || GET_CODE (operands[1]) == GT || GET_CODE (operands[1]) == GE)
>
I included the RS6000 bits for completeness, but I'm not seeking
approval now for them. I'll resubmit with proper testcases.
Paolo