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Re: [libitm] Add SPARC bits
From: Eric Botcazou <ebotcazou@adacore.com>
Date: Mon, 27 Feb 2012 21:41:23 +0100
> I think the issue is just how we unify the two cpu_relax implementations:
>
> static inline void
> cpu_relax (void)
> {
> #if defined __arch64__ || defined __sparc_v9__
> __asm volatile ("membar #LoadLoad" : : : "memory");
> #else
> __asm volatile ("" : : : "memory");
> #endif
> }
>
> for libgomp and:
>
> static inline void
> cpu_relax (void)
> {
> __asm volatile ("rd %%ccr, %%g0" : : : "memory");
> }
>
> for libitm.
>
>
> Would
>
> static inline void
> cpu_relax (void)
> {
> __asm volatile ("membar #LoadLoad" : : : "memory");
> }
>
> be good enough?
I'm not sure, because I'm pretty sure this type of membar acts as a
NOP on basically every sparc v9 chip ever made.
I would prefer to see the rd %%ccr used in both places if possible,
as we know that forces a cpu thread yield.