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[SH] Use SImode for return value in atomic_compare_and_swap*
- From: Oleg Endo <oleg dot endo at t-online dot de>
- To: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 27 Feb 2012 01:31:14 +0100
- Subject: [SH] Use SImode for return value in atomic_compare_and_swap*
Hello,
The attached patch changes the atomic_compare_and_swap expander/insn to
use SImode for the return value instead of QImode. This is more aligned
to the other insns which handle the T bit as SImode and avoids some
unnecessary test instructions in cases where the result of the atomic op
in the T bit is re-used.
Tested against rev 184582 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml/-msoft-atomic,
-m2/-mb/-msoft-atomic,
-m2a-single/-mb/-msoft-atomic,
-m4-single/-ml/-msoft-atomic,
-m4-single/-mb/-msoft-atomic,
-m4a-single/-ml/-msoft-atomic,
-m4a-single/-mb/-msoft-atomic}"
and no new failures.
Cheers,
Oleg
2012-02-27 Oleg Endo <olegendo@gcc.gnu.org>
* config/sh/sync.md (atomic_compare_and_swap<mode>): Use SImode
for return value instead of QImode.
(atomic_compare_and_swap<mode>_soft): Likewise.
Index: gcc/config/sh/sync.md
===================================================================
--- gcc/config/sh/sync.md (revision 184582)
+++ gcc/config/sh/sync.md (working copy)
@@ -109,7 +109,7 @@
[(plus "add") (minus "sub") (ior "or") (xor "xor") (and "and")])
(define_expand "atomic_compare_and_swap<mode>"
- [(match_operand:QI 0 "register_operand" "") ;; bool success output
+ [(match_operand:SI 0 "register_operand" "") ;; bool success output
(match_operand:I124 1 "register_operand" "") ;; oldval output
(match_operand:I124 2 "memory_operand" "") ;; memory
(match_operand:I124 3 "register_operand" "") ;; expected input
@@ -131,7 +131,7 @@
else if (<MODE>mode == HImode)
emit_insn (gen_zero_extendhisi2 (gen_lowpart (SImode, operands[1]),
operands[1]));
- emit_insn (gen_movqi (operands[0], gen_rtx_REG (QImode, T_REG)));
+ emit_insn (gen_movsi (operands[0], gen_rtx_REG (SImode, T_REG)));
DONE;
})
@@ -144,8 +144,8 @@
UNSPECV_CMPXCHG_1))
(set (mem:I124 (match_dup 1))
(unspec_volatile:I124 [(const_int 0)] UNSPECV_CMPXCHG_2))
- (set (reg:QI T_REG)
- (unspec_volatile:QI [(const_int 0)] UNSPECV_CMPXCHG_3))
+ (set (reg:SI T_REG)
+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CMPXCHG_3))
(clobber (match_scratch:SI 4 "=&u"))
(clobber (reg:SI R0_REG))
(clobber (reg:SI R1_REG))]