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[patch] [4.6] Backport strict-volatile-bitfields fix PR51200
- From: Ye Joey <joey dot ye dot cc at gmail dot com>
- To: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 27 Dec 2011 10:19:55 +0800
- Subject: [patch] [4.6] Backport strict-volatile-bitfields fix PR51200
Fix PR51200. Backport trunk 182545, 182649, 182685 to 4.6.
OK to 4.6?
- Joey
2011-12-20 Bernd Schmidt <bernds@codesourcery.com>
PR middle-end/51200
* expr.c (store_field): Avoid a direct store if the mode is larger
than the size of the bit field.
* stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
treat non-volatile bit fields like volatile ones.
* toplev.c (process_options): Disallow combination of
-fstrict-volatile-bitfields and ABI versions less than 2.
* config/arm/arm.c (arm_option_override): Don't enable
flag_strict_volatile_bitfields if the ABI version is less than 2.
* config/h8300/h8300.c (h8300_option_override): Likewise.
* config/rx/rx.c (rx_option_override): Likewise.
* config/m32c/m32c.c (m32c_option_override): Likewise.
* config/sh/sh.c (sh_option_override): Likewise.
2011-12-22 Joey Ye <joey.ye@arm.com>
* toplev.c (process_options): Fix typo.
testsute
2011-12-20 Bernd Schmidt <bernds@codesourcery.com>
PR middle-end/51200
* gcc.target/arm/volatile-bitfields-4.c: New test.
* c-c++-common/abi-bf.c: New test.
2011-12-26 Joey Ye <joey.ye@arm.com>
PR middle-end/51200
* gcc.dg/volatile-bitfields-2.c: New test.
Index: gcc/toplev.c
===================================================================
--- gcc/toplev.c (revision 182544)
+++ gcc/toplev.c (revision 182545)
@@ -1330,6 +1330,13 @@
flag_ira_region
= optimize_size || !optimize ? IRA_REGION_ONE : IRA_REGION_MIXED;
+ if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2))
+ {
+ warning (0, "-fstrict-volatile-bitfield disabled; "
+ "it is incompatible with ABI versions < 2");
+ flag_strict_volatile_bitfields = 0;
+ }
+
/* Unrolling all loops implies that standard loop unrolling must also
be done. */
if (flag_unroll_all_loops)
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 182544)
+++ gcc/ChangeLog (revision 182545)
@@ -1,3 +1,19 @@
+2011-12-20 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR middle-end/51200
+ * expr.c (store_field): Avoid a direct store if the mode is larger
+ than the size of the bit field.
+ * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
+ treat non-volatile bit fields like volatile ones.
+ * toplev.c (process_options): Disallow combination of
+ -fstrict-volatile-bitfields and ABI versions less than 2.
+ * config/arm/arm.c (arm_option_override): Don't enable
+ flag_strict_volatile_bitfields if the ABI version is less than 2.
+ * config/h8300/h8300.c (h8300_option_override): Likewise.
+ * config/rx/rx.c (rx_option_override): Likewise.
+ * config/m32c/m32c.c (m32c_option_override): Likewise.
+ * config/sh/sh.c (sh_option_override): Likewise.
+
2011-12-20 Richard Guenther <rguenther@suse.de>
PR lto/46796
Index: gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
===================================================================
--- gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c (revision 182545)
@@ -0,0 +1,30 @@
+/* { dg-require-effective-target arm_eabi } */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
+/* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
+/* { dg-final { scan-assembler-not "strb" } } */
+
+struct thing {
+ unsigned a: 8;
+ unsigned b: 8;
+ unsigned c: 8;
+ unsigned d: 8;
+};
+
+struct thing2 {
+ volatile unsigned a: 8;
+ volatile unsigned b: 8;
+ volatile unsigned c: 8;
+ volatile unsigned d: 8;
+};
+
+void test1(volatile struct thing *t)
+{
+ t->a = 5;
+}
+
+void test2(struct thing2 *t)
+{
+ t->a = 5;
+}
Index: gcc/testsuite/ChangeLog
===================================================================
--- gcc/testsuite/ChangeLog (revision 182544)
+++ gcc/testsuite/ChangeLog (revision 182545)
@@ -1,3 +1,9 @@
+2011-12-20 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR middle-end/51200
+ * gcc.target/arm/volatile-bitfields-4.c: New test.
+ * c-c++-common/abi-bf.c: New test.
+
2011-12-20 Dodji Seketeli <dodji@redhat.com>
PR debug/49951
Index: gcc/testsuite/c-c++-common/abi-bf.c
===================================================================
--- gcc/testsuite/c-c++-common/abi-bf.c (revision 0)
+++ gcc/testsuite/c-c++-common/abi-bf.c (revision 182545)
@@ -0,0 +1,3 @@
+/* { dg-warning "incompatible" } */
+/* { dg-do compile } */
+/* { dg-options "-fstrict-volatile-bitfields -fabi-version=1" } */
Index: gcc/expr.c
===================================================================
--- gcc/expr.c (revision 182544)
+++ gcc/expr.c (revision 182545)
@@ -6327,6 +6327,8 @@
|| bitpos % GET_MODE_ALIGNMENT (mode))
&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
|| (bitpos % BITS_PER_UNIT != 0)))
+ || (bitsize >= 0 && mode != BLKmode
+ && GET_MODE_BITSIZE (mode) > bitsize)
/* If the RHS and field are a constant size and the size of the
RHS isn't the same size as the bitfield, we must use bitfield
operations. */
Index: gcc/stor-layout.c
===================================================================
--- gcc/stor-layout.c (revision 182544)
+++ gcc/stor-layout.c (revision 182545)
@@ -622,12 +622,13 @@
/* See if we can use an ordinary integer mode for a bit-field.
Conditions are: a fixed size that is correct for another mode,
occupying a complete byte or bytes on proper boundary,
- and not volatile or not -fstrict-volatile-bitfields. */
+ and not -fstrict-volatile-bitfields. If the latter is set,
+ we unfortunately can't check TREE_THIS_VOLATILE, as a cast
+ may make a volatile object later. */
if (TYPE_SIZE (type) != 0
&& TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
&& GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
- && !(TREE_THIS_VOLATILE (decl)
- && flag_strict_volatile_bitfields > 0))
+ && flag_strict_volatile_bitfields <= 0)
{
enum machine_mode xmode
= mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1);
Index: gcc/config/m32c/m32c.c
===================================================================
--- gcc/config/m32c/m32c.c (revision 182544)
+++ gcc/config/m32c/m32c.c (revision 182545)
@@ -417,7 +417,7 @@
flag_ivopts = 0;
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
/* r8c/m16c have no 16-bit indirect call, so thunks are involved.
Index: gcc/config/rx/rx.c
===================================================================
--- gcc/config/rx/rx.c (revision 182544)
+++ gcc/config/rx/rx.c (revision 182545)
@@ -2571,7 +2571,7 @@
}
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
rx_override_options_after_change ();
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c (revision 182544)
+++ gcc/config/sh/sh.c (revision 182545)
@@ -842,7 +842,7 @@
sh_fix_range (sh_fixed_range_str);
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
}
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 182544)
+++ gcc/config/arm/arm.c (revision 182545)
@@ -1989,7 +1989,8 @@
global_options_set.x_param_values);
/* ARM EABI defaults to strict volatile bitfields. */
- if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0)
+ if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0
+ && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
/* Enable sw prefetching at -O3 for CPUS that have prefetch, and we have deemed
Index: gcc/config/h8300/h8300.c
===================================================================
--- gcc/config/h8300/h8300.c (revision 182544)
+++ gcc/config/h8300/h8300.c (revision 182545)
@@ -409,7 +409,7 @@
}
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
}
Index: gcc/toplev.c
===================================================================
--- gcc/toplev.c (revision 182648)
+++ gcc/toplev.c (revision 182649)
@@ -1332,7 +1332,7 @@
if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2))
{
- warning (0, "-fstrict-volatile-bitfield disabled; "
+ warning (0, "-fstrict-volatile-bitfields disabled; "
"it is incompatible with ABI versions < 2");
flag_strict_volatile_bitfields = 0;
}
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 182648)
+++ gcc/ChangeLog (revision 182649)
@@ -1,3 +1,7 @@
+2011-12-22 Joey Ye <joey.ye@arm.com>
+
+ * toplev.c (process_options): Fix typo.
+
2011-12-22 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR middle-end/51252
Index: gcc/testsuite/gcc.dg/volatile-bitfields-2.c
===================================================================
--- gcc/testsuite/gcc.dg/volatile-bitfields-2.c (revision 0)
+++ gcc/testsuite/gcc.dg/volatile-bitfields-2.c (revision 182685)
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+/* { dg-options "-fstrict-volatile-bitfields" } */
+
+extern void abort(void);
+struct thing {
+ volatile unsigned short a: 8;
+ volatile unsigned short b: 8;
+} t = {1,2};
+
+int main()
+{
+ t.a = 3;
+ if (t.a !=3 || t.b !=2) abort();
+ return 0;
+}
Index: gcc/testsuite/ChangeLog
===================================================================
--- gcc/testsuite/ChangeLog (revision 182684)
+++ gcc/testsuite/ChangeLog (revision 182685)
@@ -1,3 +1,8 @@
+2011-12-26 Joey Ye <joey.ye@arm.com>
+
+ PR middle-end/51200
+ * gcc.dg/volatile-bitfields-2.c: New test.
+
2011-12-23 Jason Merrill <jason@redhat.com>
PR c++/51507