Re: [PATCH] [MIPS] Add Octeon2 cpu support to GCC

[Andrew Pinski <andrew dot pinski at caviumnetworks dot com>]

On Tue, Dec 13, 2011 at 11:19 AM, Richard Sandiford
<rdsandiford@googlemail.com> wrote:
> Andrew Pinski <andrew.pinski@caviumnetworks.com> writes:
>> +(define_insn_reservation "octeon_imul3_o2" 6
>> + Â(and (eq_attr "cpu" "octeon2")
>> + Â Â Â (eq_attr "type" "imul3,pop,clz"))
>> + Â" octeon_pipe1 + octeon_mult")
>
> Excess space before ".
>
>> Index: config/mips/mips.h
>> ===================================================================
>> --- config/mips/mips.h    Â(revision 182183)
>> +++ config/mips/mips.h    Â(working copy)
>> @@ -250,7 +252,9 @@ struct mips_cpu_info {
>> Â#define TUNE_MIPS6000 Â Â Â Â Â Â Â (mips_tune == PROCESSOR_R6000)
>> Â#define TUNE_MIPS7000 Â Â Â Â Â Â Â (mips_tune == PROCESSOR_R7000)
>> Â#define TUNE_MIPS9000 Â Â Â Â Â Â Â (mips_tune == PROCESSOR_R9000)
>> -#define TUNE_OCTEON Â Â Â Â Â Â Â(mips_tune == PROCESSOR_OCTEON)
>> +#define TUNE_OCTEON Â Â Â Â Â Â Â(mips_tune == PROCESSOR_OCTEON Â Â Â\
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â|| mips_tune == PROCESSOR_OCTEON2)
>> +#define TUNE_OCTEON2 Â Â Â Â Â Â (mips_tune == PROCESSOR_OCTEON2)
>> Â#define TUNE_SB1 Â Â Â Â Â Â Â Â Â Â(mips_tune == PROCESSOR_SB1 Â Â Â Â Â Â Â\
>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â|| mips_tune == PROCESSOR_SB1A)
>
> Do any follow-on patches need TUNE_OCTEON2? ÂIf not, let's leave it out
> for now. Â(I realise they'll use TARGET_OCTEON2.)
>
> OK for 4.7 with those (trivial) changes.

Here is the patch which I committed, I had to add support to mips.exp
for -fdump-* options (I also fixed the -g* options, the regexp was
incorrect, it needed a . in front of the *).

Thanks,
Andrew Pinski

gcc/ChangeLog:
* config/mips/mips-cpus.def: Add Octeon2.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.md (define_attr "cpu"): Add Octeon2.
* config/mips/driver-native.c (host_detect_local_cpu): Support Octeon2 also.
* config/mips/octeon.md (octeon_arith): Add Octeon2.
(octeon_condmove): Likewise.
(octeon_load): Rename to ..
(octeon_load_o1): this.
(octeon_load_o2): New reserve.
(octeon_cop_o2): New reserve.
(octeon_store):  Match Octeon2 also.
(octeon_brj): Rename to ..
(octeon_brj_o1): this.
(octeon_brj_o2): New reserve.
(octeon_imul3): Rename to ...
(octeon_imul3_o1): this.
(octeon_imul3_o2): New reserve.
(octeon_imul): Rename to ...
(octeon_imul_o1): this.
(octeon_imul_o2): New reserve.
(octeon_mfhilo): Rename to ...
(octeon_mfhilo_o1): This.
(octeon_mfhilo_o2): New reserve.
(octeon_imadd): Rename to ...
(octeon_imadd_o1): this.
(octeon_imadd_o2): New reserve.
(octeon_idiv): Rename to ..
(octeon_idiv_o1): This.
(octeon_idiv_o2_si): New reserve.
(octeon_idiv_o2_di): Likewise.
(octeon_unknown): Match Octeon2 also.
* config/mips/mips.c (mips_rtx_cost_data): Add Octeon2 cost data.
(mips_issue_rate): Octeon2 can issue 2 at a time.
* config/mips/mips.h (TARGET_OCTEON): Match Octeon2 also.
(TARGET_OCTEON2): New define.
(TUNE_OCTEON): Match Octeon2 also.

testsuite/ChangeLog:
* gcc.target/mips/mips.exp (mips_option_groups): Fix debug.  Add
-fdump-* options.
* gcc.target/mips/octeon2-pipe-1.c: New testcase.
* gcc.target/mips/octeon-pipe-1.c: New testcase.

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