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[PATCH] Fix constraint on 64-bit VIS3 vector moves.
- From: David Miller <davem at davemloft dot net>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 28 Oct 2011 01:11:35 -0400 (EDT)
- Subject: [PATCH] Fix constraint on 64-bit VIS3 vector moves.
Noticed this while combing through a sparc 64-bit testsuite run.
Committed to trunk.
gcc/
* config/sparc/sparc.md (64-bit vector moves): Use 'e' not 'f'
constraint.
---
gcc/ChangeLog | 3 +++
gcc/config/sparc/sparc.md | 4 ++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 54e059e..2d864d8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
2011-10-27 David S. Miller <davem@davemloft.net>
+ * config/sparc/sparc.md (64-bit vector moves): Use 'e' not 'f'
+ constraint.
+
* regcprop.c (copyprop_hardreg_forward_1): Reject the
transformation when we narrow the mode on big endian.
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 2b4b2bb..dcd23a1 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -7686,8 +7686,8 @@
(set_attr "cpu_feature" "vis,vis,vis,*,*,*,*,*,*,vis3,vis3")])
(define_insn "*mov<VM64:mode>_insn_sp64"
- [(set (match_operand:VM64 0 "nonimmediate_operand" "=e,e,e,e,m,m,*r, m,*r, f,*r")
- (match_operand:VM64 1 "input_operand" "Y,C,e,m,e,Y, m,*r, f,*r,*r"))]
+ [(set (match_operand:VM64 0 "nonimmediate_operand" "=e,e,e,e,m,m,*r, m,*r, e,*r")
+ (match_operand:VM64 1 "input_operand" "Y,C,e,m,e,Y, m,*r, e,*r,*r"))]
"TARGET_VIS
&& TARGET_ARCH64
&& (register_operand (operands[0], <VM64:MODE>mode)
--
1.7.6.401.g6a319