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[PATCH, i386, PR50766] Fix incorrect mem/reg operands order

From: Kirill Yukhin <kirill dot yukhin at gmail dot com>
To: Uros Bizjak <ubizjak at gmail dot com>, "H.J. Lu" <hjl dot tools at gmail dot com>, gcc-patches List <gcc-patches at gcc dot gnu dot org>
Date: Wed, 19 Oct 2011 17:07:55 +0400
Subject: [PATCH, i386, PR50766] Fix incorrect mem/reg operands order

Hi,
Here is (almost obvous) patch, which fixes PR50766.

ChangeLog  entry:
2011-10-19  Kirill Yukhin  <kirill.yukhin@intel.com>

        * config/i386/i386.md (bmi_bextr_<mode>): Update register/
        memory operand order.
        (bmi2_bzhi_<mode>3): Ditto.
        (bmi2_pdep_<mode>3): Ditto.
        (bmi2_pext_<mode>3): Ditto.

Bootstrapped, test (from bug) passing.

Could you please have a look?

Thanks, K

Attachment: pr50766.gcc.patch
Description: Binary data

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